microblaze pointer alignment (gcc)

[Zorroslade000]

I am trying to cast a u32* to u8*.  This only works correctly if the u8* is on 4 byte boundary. For example,

u32 num = 0x01020304;
u8 *ptr = #
u32 *pUn0 = (u32 *)(ptr + 0);
u32 *pUn1 = (u32 *)(ptr + 1);
u32 *pUn2 = (u32 *)(ptr + 2);

pUn0 = pUn1 = pUn2, This is not the desired behavior.

gcc has some Microblaze options but nothing that relates to this.  Is there a compiler option, pragma, etc that could modify this behavior?

Or is there an option in the Vivado Block Design, I could change?

Thx

[jpeyron]

Hi @Zorroslade000,

I believe you would want to do something more along the idea:

u32 *pUn0 = (u32 *)(ptr + 0);
u32 *pUn1 = (u32 *)(ptr + 8);
u32 *pUn2 = (u32 *)(ptr + 16);

to get to the next address register.

Also, have you looked at the xilinx libraries:  xil_types.h,  xil_io.h or xbasic_types.h?

best regards,

Jon

[Zorroslade000]

Thx for the response.

I would like to cast u32* on non 4 byte boundaries.

For example, I have a binary stream:

                                                                                       address
 0x12 0x34 0x56 0x78 0x9A 0xBC 0xDE 0xF0     100000
 0x22 0x34 0x56 0x78 0x9A 0xBC 0xDE 0xF0     100008
 0x32 0x34 0x56 0x78 0x9A 0xBC 0xDE 0xF0     100010
 
 Lets say address 100000 is u8 and address 100001 (not 4 byte aligned) starts a u32.
 
 u8 *ptr = (points to 0x12 in address 100000);
 u32 *pUns = (u32 *)(ptr + 1);
 
 Since the u32 is not 4 byte aligned the cast does not provide, *pUns == 0x9A785634 (little endian). It provides 0x78563412 and is not correct.
 
 Is there an option to make non 4 byte aligned casts work?  Most compilers/arch have this functionality.
 
 Rob

[JColvin]

Hi @Zorroslade000,

I am not certain if non-aligned casts and/or accesses are readily supported. Based on the MicroBlaze reference guide (I happen to be looking at the 2017.4 version) indicates on page 52 that data accesses must be aligned unless the processor is configured to support unaligned exceptions. However, on page 170 in the MicroBlaze Core Configuration section, there is an option to enable exception handling for unaligned data access. However, none of us here at Digilent have done this before with MicroBlaze so won't be of much help in this regard. I would instead recommend asking on the Xilinx forum on how properly configure their MicroBlaze core to enable this.

Thanks,
JColvin