AD2 Logic Analyzer/Protocol Interfere with my SPI communication

[Xavier Bernard]

Hi,

I have been smashing my head on the wall for several days about a simple SPI communication between a STM32L4 and a LIS3DSH accelerometer.

When I was trying to read some INFO register, I could never read it well. It seemed that as soon as I read the first "1" bit, all the remaining bits were stuck at "1". For example, if I wanted to read a register containing 0x0A (0b00001010), it would read 0x0F (0b00001111). As soon as I unplugged the AD2, the reading was successful. The scope probe breakout board is plugged in, and I use DIO0 to DIO3 for the signals from the header of the scope breakout. I use 2.5" jumper wires and I correctly grounded.

You guys have any idea why the AD2 interferes like this?

BR,

Xavier

[xc6lx45]

A reverse Heisenbug... the problem appears only when you try to study it

You could try to insert a series resistor at the point where you attach the instrument e.g. 100 ohms (can be much higher, if needed reduce the SPI clock speed. It'll form a lowpass with the cable capacitance behind it).

A T-wire arrangement is generally problematic for edge-sensitive signals (CLK, not DATA), this can fail at any clock frequency => isolate the T-branch with resistor as above.

Have you checked the current consumption? It's not something we see frequently nowadays but in theory it could be latch-up.

One experiment is to add e.g. 10 kOhm resistors between MOSI, MISO, CLK, CS and either GND or VCC, and check that the design always works robustly. Otherwise it points to a floating-digital issue e.g. your driver tri-states CS instead of pulling it high, or something the like.