can LVDS18 drive a diff_HSTL_II_18 in the artix video board

[bharaths]

can LVDS18 drive a diff_HSTL_II_18 in the artix video board?

 I want to capture 250Mbps DDR data using the FPGA, it is driven by a LVDS driver, can I use diff hstl II in the artix video board

@jpeyron

[JColvin]

Hi @bharaths,

Can you provide some more detail on what DDR you are attempting to read from/write to? Are you using the on-board DDR present on the Nexys Video? If you are, the DDR chip is hardwired to a 1.5V bank so you would not able to readily use 1.8V logic with it. If you are using an external DDR chip (presumably DDR2 if you are using 1.8V logic), you could use the FMC connector to facilitate the communication between the LVDS and HSTL logic. Based on this forum thread from Xilinx, you should be able to directly use HSTL and LVDS with AC coupled termination with both receiving the others signals without issues.

Let me know if you have any questions.

Thanks,
JColvin

[zygot]

On 5/21/2019 at 6:15 PM, JColvin said:

you should be able to directly use HSTL and LVDS with AC coupled termination with both receiving the others signals without issues.

While not wrong, I'd caution that this advice might be overly optimistic. There's a reason why termination was given it's name; it generally needs to be as close to the source or terminus of a driven signal depending on the type of termination. It's one thing to lay out an FPGA PCB with the smallest available components to implement most inter-standard conversion schemes. It's quite another to get to work... on the first try... when you don't have past experience doing this sucessfully. While it's possible to implement AC coupled termination for such connections it's a risky business for those who don't know how to analyze and understand the design. Starting with a board that has its FPGA pins already assigned isn't going to work in your favor. Finally, if your source transfers data at a rate higher than the reference clock you need to understand all of the issues and limitations of using ISERDES2.

None of this is to say that you can't do what you want to do, but you can damage your board and expend a lot of time and effort trying to fix the unfixable. 250 Mbps isn't an extreme data rate for Artix but it isn't trivial either. It's a lot easier to violate AC and DC IO specifications near logic switching events than you probably realize.