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Justen

Genesys-2 on-board LED routing issues with IP Integrator

Question

I am trying to follow the 'Getting Started with IP Integrator' tutorial provided by Digilent with the Genesys2 FPGA boards, and despite it seeming like a simple tutorial, I can't get it working at all.

It looks like the on-board LEDs aren't being routed to the correct pins once I run the implementations. 

While following the tutorial, adding the IP, and configuring it works well. When installing Vivado on my Windows 10 machine, I downloaded the board files from Digilent following their tutorial as well. I can see the Genesys2 board upon creating the project, so I don't see the issues coming from there.

Aside from following that tutorial to a T, I also changed the clock IO Standards in the part0_pins board file to 'LVDS' as implementation was not operating properly without that - complaining about the wrong IO standard. The change has been attached to this post.

The errors I get from the messages window have also been attached to this post, and appear when the bitstream generation fails. After reading the messages and 'googling' around, users said that those errors arise when pins aren't being fixed to a package pin. I then searched around the implementation, and notice that there's a bank called led_8bits_tri_i, in the I/O ports page, that are being suspiciously mapped as inputs, all to the correct package pins. I expect the error messages are coming from the led_8bits_tri_o ports, which aren't being mapped at all.

I'm not sure how to remap them, as I've tried superseding the board files with XDC files, yet the mapping issues persist.

If anyone has experienced this before, or could provide some insight, that would be greatly appreciated,

 

Thanks, 

Justen 

 

messagesWindow_pic.PNG

part0_pins_pic.PNG

I_Oports_pin.PNG

part0_pins.xml

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6 answers to this question

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Hi @Justen,

Welcome to the Digilent Forums!

I have passed on the change to our board files you suggest to our content team.

Please attach a screen shot of your block design, wrapper and xdc file(if you are using a xdc file). 

Here is an older getting started with microblaze tutorial that might be helpful as well.

best regards,

Jon

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Posted (edited)

Thanks for the quick response, @jpeyron!

So, I am not using an XDC file, but my wrapper and block designs have been attached. These should be only what Vivado auto-generated.

Note - This problem only arises when the on-board LEDs are added to the project in Vivado. Once they are removed, everything generates as expected. DRC also runs without stating any errors

Regards,

Justen

wrapper_pic.PNG

blockDesign_pic.PNG

design_1_wrapper.v

Edited by Justen

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Hi @Justen,

I wanted to let you know that we altered the board files to reflect the LVDS clk signals and we are still researching the on board LED issue as well.

best regards,

Jon

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Hi @Justen,

Our content team confirmed there was a typo in the board files causing an issue with the on board LEDs for the Genesys 2. I fixed the typo on our GitHub.

There are 2 ways you can fix this issue. Either edit the xml file using a text editor. The board.xml file can be found here "vivado-boards\new\board_files\genesys2\H\board.xml" on line 424 from:

TRI_O

to 

TRI_T

or re-download the board files from the Digilent GitHub here.

thank you for letting us know about this issue. 

best regards,

Jon 

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