TC34725 i2c color sensor not working without any error (basys3 vhdl)

[kmesne]

Hi i implemented a vhdl code for checking results from TCS34725 there is no error in my code and i checked everywhere to correct and make it flawless but it does not work at all.

I am not very good at i2c i just know the main logic behind it so i think my problem is connected to i2c but i dont know

TCS34725 INTERFACE MODULE

https://www.mediafire.com/file/tin2rbqq6tsnx4e/tcs34725_interface.vhd/file

TOP MODULE

https://www.mediafire.com/file/9kdiz4xpvw2cv4k/tcs34725_basys_example.vhd/file

Since codes are long i just uploaded

I used https://www.digikey.com/eewiki/pages/viewpage.action?pageId=10125324 this link for i2c master just changed clock for basys3 100 MHz

[D@n]

I'm really not the VHDL designer that others are, but this particular statement caught my attention:

  controller_was_in_use    <= controller_in_use when rising_edge(clk);

That ... just doesn't look right.  The rising edge of the clock is an instant in time.  This is a continuous assignment.  Were I the synthesis tool, I'd be tempted to simplify this to 0.

Dan

[kmesne]

8 hours ago, D@n said:

I'm really not the VHDL designer that others are, but this particular statement caught my attention:

  controller_was_in_use    <= controller_in_use when rising_edge(clk);

That ... just doesn't look right.  The rising edge of the clock is an instant in time.  This is a continuous assignment.  Were I the synthesis tool, I'd be tempted to simplify this to 0.

Dan

What do you advice to change it ?

[D@n]

Combinatorial logic shouldn't depend on the clock, and certainly not on the edge of a clock.  My advice would be to put all references to rising edges specifically into your processes.

Dan