I'm trying to integrate a custom IP module (AXI4 peripheral) with the Vivado IP Integrator flow on the Arty-A7 board. I've followed the tutorial outlined here:
I am able to successfully generate a bitstream - my PWM signals should be wired out to the PMOD JB connector. However, nothing works once I try to launch an application from within SDK. Even something as simple as "Hello World" fails to run. The board support package, libraries, and applications all compile without issue. The kicker is that as soon as I revert back to the design WITHOUT the custom IP module, everything works fine and I can run applications from within SDK.
Below are screenshots of my block diagram and constraints file. The constraints file only contains the additional information required for the PWM signals, assuming all the rest of the constraints are pulled in from the board file like they are when the custom IP module is not part of the design.
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vttay03
I'm trying to integrate a custom IP module (AXI4 peripheral) with the Vivado IP Integrator flow on the Arty-A7 board. I've followed the tutorial outlined here:
https://reference.digilentinc.com/learn/programmable-logic/tutorials/zybo-creating-custom-ip-cores/start
I am able to successfully generate a bitstream - my PWM signals should be wired out to the PMOD JB connector. However, nothing works once I try to launch an application from within SDK. Even something as simple as "Hello World" fails to run. The board support package, libraries, and applications all compile without issue. The kicker is that as soon as I revert back to the design WITHOUT the custom IP module, everything works fine and I can run applications from within SDK.
Below are screenshots of my block diagram and constraints file. The constraints file only contains the additional information required for the PWM signals, assuming all the rest of the constraints are pulled in from the board file like they are when the custom IP module is not part of the design.
Thoughts??? Using Vivado 2017.4
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