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vttay03

Custom IP with Vivado IP Integrator

Question

I'm trying to integrate a custom IP module (AXI4 peripheral) with the Vivado IP Integrator flow on the Arty-A7 board.  I've followed the tutorial outlined here:

https://reference.digilentinc.com/learn/programmable-logic/tutorials/zybo-creating-custom-ip-cores/start

I am able to successfully generate a bitstream - my PWM signals should be wired out to the PMOD JB connector.  However, nothing works once I try to launch an application from within SDK.  Even something as simple as "Hello World" fails to run.  The board support package, libraries, and applications all compile without issue.  The kicker is that as soon as I revert back to the design WITHOUT the custom IP module, everything works fine and I can run applications from within SDK.

Below are screenshots of my block diagram and constraints file.  The constraints file only contains the additional information required for the PWM signals, assuming all the rest of the constraints are pulled in from the board file like they are when the custom IP module is not part of the design.  

Thoughts???  Using Vivado 2017.4

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I finally got it running, I think it had to do with the way the project cache was interacting with OOC synthesis runs.  In the attached screenshot under Generate Output Products, I changed "Synthesis Options" to "Global" and everything started working suddenly.  I think forcing it to re-synthesize everything cleared something. 

Hoping to be able to revert back to "OOC per IP" to speed up the synthesis process after I get familiar with it all.  

 

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Hi there. I am new developer with zynq7000 SoC. I am working with MicroZed board (z7010) and I want to implement a PWM technique for two switches in one leg. I have already wrote the VHDL code and also I made an IP for it. But now my problem is that I do not know how can I see the PWM output on the scope. actually I have also I/O Carrier Card and I mounted the Z7010 on it and trying to get the out put from the Pmod connections on the carrier card. also I used L19 and L20 for constraint file which is connected to the pin1 and pin2  but there is no output. I will be appreciate if you could give me a hand for it. i will put my design here. I am using Vivado 2018.3 also I wrote this c code in xilinx sdk in order to check the values of the output in that Address. thank you for your collaboration in advance

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Hi @Miladsharif,

Welcome to the Digilent Forums!

Here is forum thread that deal with getting one of our pmods working with the Avnet's Microzed. I would also suggest reaching out to Avnet support.

best regards,

Jon

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