xadc_zynq

[revathi]

Hi everyone,

Am doing research in Signal processing. My aim is to obtain the samples from xadc and it should be applied to my signal processing algorithm. Am working in Zynq 702 board. Still n ow i have applied the external analog signal to the dedicated pin Vp an Vn and by using AMS gui i have debugged the xadc converted value.

  Now without using any GUI , i would like to debug only the Vp and Vn converted value by using ILA, i have attached the block diagram of my design and the specifications.kindly refer it.

My Problem is i have selected channel sequencer and i need to visualize only the xadc data of Vp and Vn input signal. But in Do[15:0] am geeting all the datas like temperature, alarm etc.  KIndly reply me it will be helpful for my research progress.

XADC block dgm.docx

[revathi]

Hi @jpeyron,

                  I have tried today by applying the input from -500mV to +500mV, and i got the 16 bit ADC result. 

                  But i fully do not understand why i didnt get exactly the same input voltage range. some deformation in waveform is arising. (+0.436V and -0.392V am getting as output)  

                 At the same time the smoothing of output signal is not so fair.  

                I have attached my ILA window and excel output. Kindly give a glance and thankyou for your continuous support.

 

 

 

                  

Horizontal Axis: No of samples

Vertical axis: Output voltage value

 

[revathi]

Hi,

 I would like to know more in detail about the 

 i) How to synchronize the input signal with the ILA capturing data (i.e., each time am capturing different signal in ILA, i would like to capture the same signal all the time by triggering or in some other way) I referred the ILA debugging manual, but still am not clear about the synchronization

ii) The second thing is , is there any  possibility  to increase the ILA window depth to capture the signal for long time. As the maximum depth of the ILA is 131072 samples.

 

Kindly let me know your suggestion for the above.

 

 

[D@n]

@xc6lx45,

2 hours ago, xc6lx45 said:

I'd recommend you spend a working week "researching" the electrical-engineering aspects.

The ADC may look just as an afterthought to DSP but it will require significant engineering resources (plan for several / many man-months). Long is the list of bright-eyed students / researchers / engineers / managers who have learned the hard way that there is a bit more to the problem than finding two boards with the same connector...

+1

I've been on more projects than I care to count where the digitizer was poorly engineered, and noise from the system (perhaps on the power line) came through and corrupted the measurements.  Since I was the software guy, I'd always try to "fix" this sort of thing in software with the sad reality that nothing I did ever really "fixed" the problem.

Dan

[xc6lx45]

I'd recommend you spend a working week "researching" the electrical-engineering aspects.

The ADC may look just as an afterthought to DSP but it will require significant engineering resources (plan for several / many man-months). Long is the list of bright-eyed students / researchers / engineers / managers who have learned the hard way that there is a bit more to the problem than finding two boards with the same connector...

Hint, check how much latency you can tolerate and research "digitizer" cards for PC (or PXI platform). If you don't need a closed-loop real-time system, don't design for a closed-loop realtime system.

[revathi]

Hi @jpeyron ,

    In my research work, my target is , the sampling frequency of digitizer should be 260 MHz. Now am using the xadc of Zynq 702. Do you have any idea of ADC  that connects to zynq 702 board, that should have Maximum sampling frequency of 260MHz

 

[jpeyron]

Hi @revathi,

Here is an article by real digital that provides some additional information about the XADC and averaging.

best regards,

Jon

[revathi]

Hi eveyone,

   In UG480, XILINX manual, at page 25, 

"The ADCs always produce a 16-bit conversion result. The 12-bit data correspond to the 12
MSBs (most significant) in the 16-bit status registers. The unreferenced LSBs can be used to
minimize quantization effects or improve resolution through averaging or filtering "  UG480

 

Is it anyone give more details about the averaging used here.  what is the actual averaging behind that four bits. Am not fully understand about the last 4 bits from XADC, am in need of more information regarding the bits.  

 

 

I have already posted the same question in XILINX too.

 

[jpeyron]

Hi @revathi,

I am not quite sure why the Vp/Vn channel is not outputting as expected. I would suggest reaching out to Xilinx for more experienced input for the Xilinx's XADC , the XADC wizard and the ZC702. 

best regards,

Jon

[revathi]

Hi @jpeyron,

     I would like to do differentiation function on  xadc output. Will you give some basic idea or any references for doing the differentiation function over the ADC output

 

 

 

Thanking you 

[jpeyron]

Hi @revathi,

We do not have a ZC702. I did find some material for the ZC702 and the xadc her. Here and Here are some xilinx forum threads that might be helpful as well.

best regards,

Jon

[revathi]

Hi @jpeyron,

In XADC wizard i make Vp and Vn as external ports. In XDC file i have given like below,

 

set_property IOSTANDARD LVCMOS18 [get_ports vp_in_0]
set_property IOSTANDARD LVCMOS18 [get_ports vn_in_0]
set_property PACKAGE_PIN L11 [get_ports vp_in_0]
set_property PACKAGE_PIN M12 [get_ports vn_in_0]

 

 

* why there is a reduction in amplitude of xadc output when there is a increase in frequency. My understanding is that may be due to anti aliasing filter. If so, how to overcome that problem. Is it you have any idea regarding my issue.

 

Thankyou for your support

[jpeyron]

Hi @revathi,

Please attach a picture of your XADC wiring to the ZC702 dev board along with a screen shot of the XADC wizard adc setup page.

best regards,

Jon

[revathi]

Hi @jpeyron, 

     I have noticed one thing today, If I reduce the frequency , the ADC code gets increases like this. But its really look no meaning how it happens, why there is a indirect proportional to frequency and voltage. It may be due to any anti aliasing filter effects. I don,t know exactly.

 

 

and still am not clear in Vn offset, I would like you to notice what I realized from the manual UG480. Kindly refer the figure below.

 

 

 

 

 

[revathi]

Hi @jpeyron,

 I have attached my unipolar xadc output signal. Kindly check it off, the same deformation of voltage is there.

 Vp sinput signal is 0 to 1V, with offset of 500mV.

Vn is from DAC B, default value is 0V.

Freq from generator is 10Khz

I don't understand why there is only 0.93V max and 0.3V minimum.

[revathi]

 Hi @jpeyron,

The sampling rate is  961.54 Kbps 

 

 

I have attached my SDK code, for bipolar mode. Kindly go through it.

Recently i got the waveform with proper shape and smoothing, the only thing is  there is some deformation of voltage in output.

 

 

 

                        Fig 3: TEST SIGNAL FOR BIPOLAR MODE _NO OFFSET

 

                                 FIG 4: INPUT SIGNAL (VP) CONNECTION FROM AWG TO FPGA KIT

                                         FIG 5 : TEST SIGNAL TO UNIPOLAR MODE

                   

1.      Weather configuring the bipolar / unipolar mode in XADC WIZARD is enough?

2.      Or I need to make some changes in sdk code

3.      My assumption is am doing some error in SDK code

          I will attach my SDK code , I followed the Adam taylor and  this attached link for coding and referred the xsysmon .h    lab 3

4.      The boxed thing in sdk code was added myself for bipolar and unipolar

5.      Is it necessary to give the coding which i have given inside the text box?

6.      Is it am doing any error in code ?

 

sdk code.docx

[jpeyron]

Hi @revathi,

What is the Sample rate of the XADC. Please attach your SDK Code.

best regards,

Jon

[jpeyron]

Hi @revathi,

Its my understanding that bipolar mode is -.5v to .5v instead of 0v to1v as described in the 7 Series FPGAs and Zynq-7000 SoC XADC Dual 12-Bit 1 MSPS Analog-to-Digital Converter User Guide on page 23.

best regards,

Jon

[revathi]

Hi everyone,

    I got the result for XADC , I applied a continuous sine wave signal to the dedicated pin Vp and Vn. I have debugged the value.

I noticed the result is from 0000h to 7fffh only, but my input signal is from 0 to 1V , with 5000 mv Vn offset

I have attached the ILA window also, what could be the reason for my output only from 0 to 0.5V 

 

 

[revathi]

Hi @jpeyron,

 Thankyou for your prompt reply. I have posted the same question in Xilinx forum.

Thankyou

[jpeyron]

Hi @revathi,

Unfortunately we have not work with the AMS_101. We would suggest to reach out to Xilinx about the AMS 101 mezzanine card.  

best regards,

Jon

[revathi]

Hi, 

I would like to give more detail about my work. If you look into he document AMS_101 , in page 34, Fig, 3.6. As of now, i have connected the Positive and negative terminal of input signal to J2 of Pin 1 and Pin2. In that particular figure, "Apply Negative Analog Input Voltage with “Vn Offset” Window in AMS Evaluator"

* It is in the case of AMS GUI Evaluator. 

* I don't want to use AMS evaluator, so in my case how to apply Vn offset 

 

 

Thanking you

[revathi]

Hi @jpeyron,

      Thankyou jpeyron for your kind reply. I have looked into the examples. Suddenly i had a small doubt. My question may be little basic. But, i need to clarify my confusion.

  As i mentioned in the previous post, i applied Vn offset as 500mV in arbitary waveform generator.

1) In AMS evauation card 101 here , i have connected the positive supply to Pin 1 of J2 and negative supply to pin 2 of J2 from arbitary waveform generator.

2) In Bipolar mode, i have given Vn offset in waveform generator. How i can set my Vn offset in XADC manually, is it possible to do so

3) Or setting Vn offset in waveform generator is enough 

 

[jpeyron]

Hi @revathi,

As of yet, I have not used the XADC in bipolar mode.

I would suggest looking at the xilinx ZYNQ sysmon examples that should be here C:\Xilinx\SDK\2018.3\data\embeddedsw\XilinxProcessorIPLib\drivers\sysmonpsu_v2_5\examples 

if you used the default path when installing vivado.   

I would suggest looking at the different functions in the XSysMonPsu as well as the xparameter.h 

best regards,

Jon

[revathi]

Hi @jpeyron,

   Thankyou for your kind reply. As you said in page 22 of XADC user guide, the setting of bipolar selection is there.  But am not instantiating the XADC using simulation code. I Exported my whole design to SDK and then i created an application project. In SDK, how to instantiated the bipolar selection. I attached my bipolar signal waveform and the C code i have used for my application. Kindly refer it.

 

#include <stdio.h>

#include "platform.h"

#include "xadcps.h"

#include "Xil_types.h"

#include "sleep.h"

#define XPAR_AXI_XADC_0_DEVICE_ID 0 //ID of xadc_wiz_0

#define XAdcPs_RawToExtVoltage(AdcData) ((((float)(AdcData))* (1.0f))/65536.0f)

                             //(ADC 16bit result)/16/4096 = (ADC 16bit result)/65536

                            // voltage value = (ADC 16bit result)/65536 * 1Volt

static XAdcPs XADCMonInst;  //a XADC instance

int main()

{

XAdcPs_Config *ConfigPtr;

XAdcPs *XADCInstPtr = &XADCMonInst;

//status of initialisation

int Status_ADC;

//Vp_Vn

u32 VP_VNRaw;

float VP_VNData;

init_platform ( );

printf ("Zynq using vivado \n\r");

//XADC initialization

ConfigPtr = XAdcPs_LookupConfig(XPAR_AXI_XADC_0_DEVICE_ID);

    if (ConfigPtr == NULL )

    {

   return XST_FAILURE;

    }

    Status_ADC = XAdcPs_CfgInitialize(XADCInstPtr,ConfigPtr,ConfigPtr->BaseAddress);

    if ( XST_SUCCESS != Status_ADC )

    {

        printf("XADC failed initial");

        return XST_FAILURE;

    }

// self test XADC

    Status_ADC  = XAdcPs_SelfTest(XADCInstPtr);

    if (XST_SUCCESS != Status_ADC)

    {

        printf("XADC failed self test");

        return XST_FAILURE;

}

  XAdcPs_SetSequencerMode(XADCInstPtr,XADCPS_SEQ_MODE_SAFE);                             

XAdcPs_SetSeqChEnables (XADCInstPtr, XADCPS_CH_AUX_MIN);                              "HERE HOW TO INSERT MY CODE FOR SELECTING BIPOLAR MODE"

XAdcPs_SetSeqInputMode (XADCInstPtr, XADCPS_CH_AUX_MIN);

XAdcPs_SetSequencerMode(XADCInstPtr,XADCPS_SEQ_MODE_CONTINPASS);

 

while(1){

        // VP_VN

        VP_VNRaw = XAdcPs_GetAdcData(&XADCMonInst,XADCPS_CH_AUX_MIN);

        VP_VNData = XAdcPs_RawToExtVoltage(VP_VNRaw);

        printf("Raw VP_VN %lu   Data VP_VN %f \n\r", VP_VNRaw, VP_VNData);

}

return 0;

}

 

Thanking you,

 

 

[jpeyron]

Hi @revathi,

Can you please attach a picture of your setup.  I have not used bipolar mode but I believe there is an example in the XADC user guide on page 22.

best regards,

Jon