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Pin Naming Conventions


I am trying to figure out the pin functions on both the Zedboard and KC705 boards, and was wondering if there was a document that explains the functions of the pins based on their names. 

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Why yes, there is a document that indicates Xilinx pin naming conventions: UG475 7 Series packaging and Pinout Product Specification User's Guide, see Table 1-12. This is one of the many valuable documents that is required reading for the FPGA developer.

Use the Document Navigator. Download all relevant documents for your device as your personal library. Check often for updates.

I realize that there is a ton of stuff to read but learn how to find answers to your questions. Xilinx doesn't always make it easy to find specific information which is why it's important to get familiar with what's available and where specific information might be.Your question is a very good one and I'm surprised that it hasn't shown up before ( well as long as I've been using this forum...).

[edit] A peculiar thing about the Zynq family is that Xilinx seems to treat it like an ARM product even though different versions have a PL based on different Xilinx FPGA families. This means extra work for the customer. The pin name conventions work for Zynq PL pins and all other Xilinx FPGA families.

Edited by zygot

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Hi @sbellamy,

If you are referring to the pins in the schematic, those names tend to be based on what Xilinx dictated the pin names for the Zynq. Otherwise, I would recommend looking at the Avent User Guide that is on the Zedboard Resource Center. Digilent doesn't make the KC705, but it has it's own user guide from Xilinx here that also explains the pin assignments here https://www.xilinx.com/support/documentation/boards_and_kits/kc705/ug810_KC705_Eval_Bd.pdf.


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