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Synthesis is not carried out successfully in Vivado 2018


vlad_fpga

Question

I ask to help! I have successfully no Synthesis in the environment of Vivado 2018.2. I need to study creation of projects for FPGA. I downloaded from the website xilinx.com a Vivado 2018.2 package for 30 days (for the Windows_7_64bit) and executed installation on the laptop. Chose WebPACK configuration. I create simple projects (the head module and the testbench module) and SUCCESSFULLY I carry out Simulation. But further I should do for the Synthesis project and then Implementation. But Synthesis is not carried out successfully. And, at start of the project on Synthesis, the following prevention appears:

The proposed launch directory is non-default and will reduce the portability of this project. Do you wish to proceed anyway?

I click OK, but quickly Synthesis comes to the end with the message about UNSUCCESSFUL performance. Still specification: I do not create the module of Restrictions. Also I tried to obtain the full license for 30 days, but as to make it on the website xilinx.com - unclear. But, maybe, at me not in the license business!

I ask to explain to me: as to me to achieve performance of successful Synthesis.

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Dear friends! I solved the problem. To me everything was competently explained by the great expert Mikhail Korobkov. He is an employee of СTС "INLAYN GRUP".
Problem reason: the name of the computer cannot be written with the Russian letters.
The subject is closed.

Мне помог Михаил Коробков.JPG

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