Question

Hello everyone!

I'm Harri, an EE Master's student. Me and my team are currently working on assignments for three different courses around the topics of FreeRTOS, digital filtering and hardware-in-the-loop with MATLAB and Simulink. We are using the Zybo Z7-10 board and Vivado/SDK v.2018.2.

 

In the first project, we are trying to use the Xilinx port of FreeRTOS to run a control engineering state-space-model on the ARM side. The vision is to have the model, which is a DC-converter, run at 10 kHz and the output of the model is shown as PWM to the onboard RGB LED. The project should also have a menu system via UART/Ethernet or by buttons and switches. These should be mutually exclusive, so when one input method is in use, the other will be blocked. We are kind of puzzled with this one, because our initial plan was to enable interrupts for GPIO and UART and then have those either take a semaphore from the ISR or send a struct to a queue from ISR. So far using the xscugic and registering the interrupts has been a huge puzzle for us and the workflow around this is unclear to us. We have managed to get task notifications to work from button press to periodic task, but trying anything more than that e.g. queues seems to not work. Any help on these topics would be highly appreciated!

 

The other two project are on digital filtering. We are simply trying to run some simple audio effects on the music from LINE/MIC IN -> OUR FILTER -> HPHOUT. We have used this example https://reference.digilentinc.com/learn/programmable-logic/tutorials/zybo-z7-dma-audio-demo/start as a starting point and got that to work. Now we would like to remove the DMA part and just add our filtering IP in the middle. The PS side and buttons would be used for simple visuals for amplitude on LEDs or enable/disable certain effects inside the block. Any guidance on this one? We have already read the audio codec manual/register map, but we are missing something. Also, if someone has experience with Mathworks MATLAB and Simulink and this Zybo Z7-10 board, that would be awesome, as the other project is actually more focused on the filter design part and not FPGA stuff. Also, our professor would be glad to have this kind of HIL setup demoed: https://se.mathworks.com/help/hdlcoder/examples/running-an-audio-filter-on-live-audio-input-using-a-zynq-board.html. We have tried following the setup guide for that one, but we are tripping at the point of connecting to the board and running the simulation. The SD card setup also is not well explained.

 

I'm hoping to get help, ideas and inspiration from here! I'll be glad to also share the projects when they're done.

 

Cheers,

Harri

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Hi @Harza55,

Welcome to the Digilent Forums!

Sounds like some interesting Homework projects. 

Unfortunately we do not have experience with Matlab/Simulink and not much experience with freeRTOS.  Hopefully some of the forums more experienced community members might have some input for you. Here is the resource center for the Zybo Z7.  We have and DMA audio example that might be helpful with your audio filtering project here.  I would also suggest reaching out to FreeRTOS and Mathworks support about your projects as well.

best regards,

Jon

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Hmm.. that's a bit of a letdown. As I mentioned earlier, we have already tried the demo, but want to skip the DMA. Is there any way to get better visibility here, just in case some of the other members have experience with these topics?

 

Thanks,

- Harri

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Hi @Harza55,

I moved your post to the FPGA section where more experienced FPGA community members look. Since the Zybo Z7 and Zybo use the same codec I would also suggest looking at the Zynq Book.  Here is a non digilent Zybo Beat Maker Project with Audio Driver and here is a non- digilent IP core driver for the audio part of the Zybo. Here is a Zybo audio instructable that should be helpful as well.

best regards,

Jon

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