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software development for matrix multiplication ip


Ram

Question

Hello  Everyone

i am trying to write 'C' code in sdk for matrix multplication ip of the order of 2*2.

first of all i found verilog code of matrix multiplication ,

//Module for calculating Res = A*B
//Where A,B and C are 2 by 2 matrices.
module Mat_mult(A,B,Res);

    //input and output ports.

    //The size 32 bits which is 2*2=4 elements,each of which is 8 bits wide.    
    input [31:0] A;
    input [31:0] B;
    output [31:0] Res;
    //internal variables    
    reg [31:0] Res;
    reg [7:0] A1 [0:1][0:1];
    reg [7:0] B1 [0:1][0:1];
    reg [7:0] Res1 [0:1][0:1]; 
    integer i,j,k;

    always@ (A or B)
    begin
    //Initialize the matrices-convert 1 D to 3D arrays
        {A1[0][0],A1[0][1],A1[1][0],A1[1][1]} = A;
        {B1[0][0],B1[0][1],B1[1][0],B1[1][1]} = B;
        i = 0;
        j = 0;
        k = 0;
        {Res1[0][0],Res1[0][1],Res1[1][0],Res1[1][1]} = 32'd0; //initialize to zeros.
        //Matrix multiplication
        for(i=0;i < 2;i=i+1)
            for(j=0;j < 2;j=j+1)
                for(k=0;k < 2;k=k+1)
                    Res1[j] = Res1[j] + (A1[k] * B1[k][j]);
        //final output assignment - 3D array to 1D array conversion.            
        Res = {Res1[0][0],Res1[0][1],Res1[1][0],Res1[1][1]};            
    end 

 

 

then i create ip in vivado .during ip creation part in user logic section i take two input A and B of 32 bit.

then after that i create block design and generate bit stream . then i write following code in sdk ..

#include "xparameters.h"
#include "xil_io.h"
#include "xbasic_types.h"
#include <stdio.h>
#include "myip_matix_Ani.h"


#define MAT_A_ROWS 2
#define MAT_A_COLS 2
#define MAT_B_ROWS 2
#define MAT_B_COLS 2

int main()
{
int A[2][2], B[2][2],j, i;
int C[2][2];


xil_printf("enter 4 numbers for A matrix\n");

for(i=0;i<2;i++)
for(j=0;j<2;j++)
scanf("%d", &A[j]);
{

Xil_Out32(XPAR_MYIP_MATIX_ANI_0_S00_AXI_BASEADDR+(j*sizeof(int)+i*MAT_A_ROWS*sizeof(int)), A[j]);
}

xil_printf("enter 4 numbers for B matrix\n");


for(i=0;i<2;i++)
for(j=0;j<2;j++)
scanf("%d", &B[j]);
{


Xil_Out32(XPAR_MYIP_MATIX_ANI_0_S00_AXI_BASEADDR+4+(j*sizeof(int)+i*MAT_A_ROWS*sizeof(int)), B[j]);
}
for(i=0;i<2;i++)
for(j=0;j<2;j++)

{

C[j]= Xil_In32(XPAR_MYIP_MATIX_ANI_0_S00_AXI_BASEADDR+8+(j*sizeof(int)+i*MAT_A_ROWS*sizeof(int)));
}
xil_printf("{\r\n");
for (i = 0; i < MAT_A_ROWS; i++)

for (j = 0; j < MAT_B_COLS; j++)
xil_printf("%d\n",C[j]);
}

but this code is not generating correct results...everytime it generate wrong results ...

can anyone please tell me what is the problem ...

your reply would be really helpful for me .

Thanks

Ram

 

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Hi,

I think there are multiple layers of bugs. I suggest you discard the "example" except maybe for the interface,, start from scratch and don't use "for" loops anywhere (the result has only four entries).

Some of the bugs (again, I wouldn't bother with the code. By the time you've understood the clever bits that won't work, you could have written it twice from scratch, IMHO)

scanf("%d", &A[j]);
scanf("%d", &B[j]);
Res1[j] = Res1[j] + (A1[k] * B1[k][j]);

where is the 2nd dimension?

Where do you read "8 bit" values?

what happens if I use "int" in C (which is signed) and "int" in Verilog (which is not)

What happens if your result goes out of bounds (e.g. beyond -128..127 if signed or 0..255 if unsigned)? This isn't necessarily a bug but usually you safeguard e.g. using saturation or a separate overflow output.

When you compile it, you may run into timing issues since it doesn't allow for processing delay (add registers to the output, the software will never be that fast anyway).

If I had to do this homework, I'd start with multiplying a single number (not a matrix).

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