PMODDA2 (DA2RefComp) in VIVADO as an IP module or RTL Module

[mehmetdemirtas89]

hey everyone,

I am trying to generate different waveforms of analog signals using ZEDBOARD + PMODDA2. My previous question was about Pmod+zedboard.  Then, I was able to simulate the example  verilog code (pmod_da2_demo) and -after changing the constraint file (.xdc)- i generated the bitstream and programmed the FPGA on my ZEDBOARD. This example piece of code generates an 12-bit digital input to the DAC and the output is expected to be a triangular waveform whose output amplitude is in between around 1.5 and 2.5 Volts. When I checked the output on the o-scope i have obtained the following wave.

However, I want use both PS and PL parts of the Zedboard. That is why i need a block design which will have ZYNQ7 PS + AXI interconnect + Processor System Reset etc plus my PMODDA2's  reference component i.e. DA2RefComp. DA2RefComp's inputs are CLK,RST,DATA1,DATA2 and START. If I package DA2RefComp as an IP its GUI looks like as the following:  

 The other option is to make an RTL module using the given DA2RefComp.vhd as shown below. 

I tried to make the RTL module to work with Zynq7 PS. Then reading from the forum's suggestions, I tried to make the following circuit. Using AXI GPIOs and AXI Int etc are connected automatically. The triangle_0 IP module just generates triangular wave. MY question is this connection below seems correct? I couldnt make it work, yet. Secondly, the CLK input of DA2RefComp requires 50 MHz input so should I divide the clock of the PS? What should I do with the RST input of DA2RefComp? Is it just good when connected to the other resets automatically?

 

 

 

 

 

 

 

[jpeyron]

Hi @mehmetdemirtas89,

Here is a forum thread that includes a project done by a community member for the PmodAD1 using the ADD a module function and the AXI GPIO IP Core. This example should help you correctly set up your project.

best regards,

Jon

 

[mehmetdemirtas89]

Hi @jpeyron

Actually, i checked almost all forum threads/posts about this topic. However, probably because of my lack of expertise I cannot solve the problem. If I create RTL module then i cannot figure out how to connect it to the AXI GPIO IP. Moreover, if I create an IP out of DA2RefCOmp,  i dont figure out how to interface it with AXI. For example, I have a problem with connecting the CLK,RST and START inputs of DA2RefComp... I dont get where those inputs should be connected?

I exactly know that the outputs should be routed to the external pins.. that is the easy part. Also, the DATA1 and DATA2 inputs are fed by my wave_generator. 

Any forum member's help on this problem is welcomed...

my best regards,

P.S. Do I need to design module i.e. DA2REFComp_Controller (IP or RTL module) to control the inputs/outputs of the DA2RefComp ?

MD

[jpeyron]

Hi @mehmetdemirtas89,

I have attached a community members project that uses the Pmod AD1 with HDL and the Add a module function through the AXI GPIO IP Core. This project should help you with your project.

best regards,

Jon

Notarobot_AD1.zip