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Dom_123

basys 3 WiFi usage

Question

Hi @jpeyron,

I am also attempting to send Pmod Hygro data to a PC (or to the cloud) using the Pmod WiFi. Do I need an SD card for this to be possible (like in the tutorial) or is there another way. I'm using the BASYS 3 FPGA

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Hi@jpeyron,

I have moved a jumper from the Pmod HYGRO to the JTAG position as mentioned and the values are still the same. Will removing a JTAG from the HYGRO be detremental? 

thanks, 

Dom.

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Hi @Dom_123,

Removing a I2C pullup resistor on the Pmod HYGRO will cause the pmod to not work.  If you do not have a blue jumper then wrap a metal wire around the two intended jumper pins. Make sure there is no part of the metal wire is connecting to anything else.

thank you,

Jon 

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I have wrapped a metal wire around the jumper pins for the SDA on the HYGRO, reprogrammed the FPGA and re ran the main.c and the numbers printed to the serial haven't changed.

Sorry for making this such a task, I know it should be straightforward.

thanks again,

Dom.

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Hi @Dom_123,

I have attached screen shots for my exact process from vivado/SDK 2018.3 as well as a picture of my setup. Here is a verified Vivado 2018.3 basys 3 Pmod HYGRO.

1) Please download my Vivado 2018.3 project then launch the SDK.

2) Open Tera Term and connect the basys 3.

3) Next in SDK program the FPGA and right click on the application and select run as-> launch on hardware(system debugger). 

4) does the project run as expected.

5) Looking through my process is there something that is different than what you have done?

6) Could you try making a new project from scratch?

7) Does it still have the same issues?

best regards,

Jon

basys3_PmodHYGRO.jpg

basys3_pmodHYGRO.zip

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Out of interest, should the TX led be flashing to say that the fpga is transferring data? as only the RX led is flashing when the board is programmed.

Dom.

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Running the given file gives the same data as i have always received. These critical warnings appear when I load up the Block design, similar to warnings i had the last time i tried using one of your351788756_Againerrors.thumb.png.c2528294cfb48fb04efc57886daf5f53.png designs. Thoughts?

Thanks,

Dom.

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Hi @Dom_123,

These errors should only show up if you open the block design in the Vivado project( the errors are because vivado can not find the IP cores as well as the Pmod Bridge and IF folder linked in the IP repository. The path for the repository needs to be updated to where your unzipped Vivado library folder is on your PC).

We would like to check the Basys 3/Pmod HYGRO using a pre-done project.

To do this all you need to do is launch the project(make sure it is a freshly unzipped project that has not been opened on your PC before) and then in Vivado click on file and launch SDK.  

I was having you launch the vivado project to more easily launch the sdk application and SDK portion of the complete project. 

Now open tera term and have it  connected to the com port of the basys 3.

Next ,  in SDK  Program the FPGA, and then right click on the already created application and select run as-> launch on hardware(system debugger).

make sure the basys 3 is set to jtag mode and both of the pull up resitors are shorted on the Pmod HYGRO. Also make sure that you are plugging in the Pmod HYGRO on the top row of Pmod Port JB.

Do you get good data in tera term?

best regards,

Jon

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Hi @jpeyron,

I have done this and unfortunately the data i receive is the same data I have always received. I now understand the block design errors thank you for explaining. 

Any other ideas as to what the issue could be? The BASYS is in jtag with both pullups shorted and in usb mode using the blue jumpers. The HYGRO is connected to the top 6 pins of the JB port. 

thanks,

Dom.

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Hi @Dom_123,

If you understand the block design errors, does this mean that you have started a fresh project and resolved the path errors to the Vivado Library folder?

Thanks,
JColvin

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4 minutes ago, JColvin said:

Hi @Dom_123,

If you understand the block design errors, does this mean that you have started a fresh project and resolved the path errors to the Vivado Library folder?

Thanks,
JColvin

These block errors have only occurred when opening a design made by @jpeyron, when I create my own block designs i have no such errors. I do get the errors that are inevitable and because the Pmod IP's were created using another board but they are the only errors i receive when creating my own design and i understand they can be ignored?

What i dont understand is why i am receiving any printed data at all? where does this data originate as it is clearly a loop that isn't accurate?

Thanks,

Dom.

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Hi @Dom_123,

I created my own separate project using the Basys 3 and Pmod HYGRO and was able to successfully receive accurate data. We are looking further into your situation to see what could be different, since the data pulls from a register that the read function sends to.

Thanks,
JColvin

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3 minutes ago, JColvin said:

Hi @Dom_123,

I created my own separate project using the Basys 3 and Pmod HYGRO and was able to successfully receive accurate data. We are looking further into your situation to see what could be different, since the data pulls from a register that the read function sends to.

Thanks,
JColvin

Hi JColvin,

Would you like me to send in one of my fully completed projects that is printing the wrong/bad data? If so, please advise on how to do so as the zipped file is too large to send on this forum.

thanks again,

Dom.

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Hi @Dom_123,

I would probably recommend dropbox or something similar since the people who manage the server side of things over at Digilent don't want to increase the file size options for uploading to the forum.

I do have another thing that we can do to test the HYGRO functionality; mostly I added a function to the demo code that reads the device ID of the embedded chip in the Pmod HYGRO since that will be a constant value and should (ideally) help point towards where the issue might be. I have attached the 3 relevant files so if you could replace the main.c in the application project (under it's respective source file) and PmodHYGRO.c and .h files in wrapper_hw_platform (drivers -> PmodHYGRO_v1_0 -> src) with the their respective files (or at least the contents), save the changes, and then relaunch the application on the hardware (after programming the FPGA with the bitstream).

What you should see in the serial terminal is: "DevID: 0x1050 is devID" followed by the temperature and humidity data on each line.

Thank you,
JColvin

PmodHYGRO.c PmodHYGRO.h main.c

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21 hours ago, JColvin said:

Hi @Dom_123,

I would probably recommend dropbox or something similar since the people who manage the server side of things over at Digilent don't want to increase the file size options for uploading to the forum.

I do have another thing that we can do to test the HYGRO functionality; mostly I added a function to the demo code that reads the device ID of the embedded chip in the Pmod HYGRO since that will be a constant value and should (ideally) help point towards where the issue might be. I have attached the 3 relevant files so if you could replace the main.c in the application project (under it's respective source file) and PmodHYGRO.c and .h files in wrapper_hw_platform (drivers -> PmodHYGRO_v1_0 -> src) with the their respective files (or at least the contents), save the changes, and then relaunch the application on the hardware (after programming the FPGA with the bitstream).

What you should see in the serial terminal is: "DevID: 0x1050 is devID" followed by the temperature and humidity data on each line.

Thank you,
JColvin

PmodHYGRO.c 12.55 kB · 0 downloads PmodHYGRO.h 3.39 kB · 0 downloads main.c 4.64 kB · 0 downloads

Hi @JColvin,

Good idea ill do that now and let you know what results i get!

thanks, Dom. 

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21 hours ago, JColvin said:

Hi @Dom_123,

I would probably recommend dropbox or something similar since the people who manage the server side of things over at Digilent don't want to increase the file size options for uploading to the forum.

I do have another thing that we can do to test the HYGRO functionality; mostly I added a function to the demo code that reads the device ID of the embedded chip in the Pmod HYGRO since that will be a constant value and should (ideally) help point towards where the issue might be. I have attached the 3 relevant files so if you could replace the main.c in the application project (under it's respective source file) and PmodHYGRO.c and .h files in wrapper_hw_platform (drivers -> PmodHYGRO_v1_0 -> src) with the their respective files (or at least the contents), save the changes, and then relaunch the application on the hardware (after programming the FPGA with the bitstream).

What you should see in the serial terminal is: "DevID: 0x1050 is devID" followed by the temperature and humidity data on each line.

Thank you,
JColvin

PmodHYGRO.c 12.55 kB · 0 downloads PmodHYGRO.h 3.39 kB · 0 downloads main.c 4.64 kB · 0 downloads

@JColvin

Okay so this is the device ID that is printed to the serial term, also the temp and humid readings have changed? 

thanks. Dom.

RETRY NEW ID IDEA.png

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Hi @Dom_123,

Would you be able to upload your zipped project to either dropbox or google drive or something similar? The fact that you are now getting 0's for the temperature and humidity indicates that your Pmod HYGRO might be damaged, though this will help verify this for certain. Additionally, did you put the source and header files in the wrapper rather than just the application like it shows in your screenshot?

Thanks,
JColvin

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Hi @Dom_123,

I ran your project with no issues today. I got the correct device ID and usable temp/humidity.  It sounds like a hardware issue.

I have sent you a PM about the next steps.

best regards, 

Jon

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