Dom_123 Posted March 21, 2019 Share Posted March 21, 2019 Hi @jpeyron, I am also attempting to send Pmod Hygro data to a PC (or to the cloud) using the Pmod WiFi. Do I need an SD card for this to be possible (like in the tutorial) or is there another way. I'm using the BASYS 3 FPGA Link to comment Share on other sites More sharing options...
Dom_123 Posted March 28, 2019 Author Share Posted March 28, 2019 Hi @jpeyron, I have done this and unfortunately the data i receive is the same data I have always received. I now understand the block design errors thank you for explaining. Any other ideas as to what the issue could be? The BASYS is in jtag with both pullups shorted and in usb mode using the blue jumpers. The HYGRO is connected to the top 6 pins of the JB port. thanks, Dom. Link to comment Share on other sites More sharing options...
jpeyron Posted March 27, 2019 Share Posted March 27, 2019 Hi @Dom_123, I see your problem. You have multiple design_1_wrapper_hw_platforms. My guess is that your application is using the original hw_platform and that is why you keep getting the same data. All of your changes are not being implemented. One way to get multiple platforms is to not start with fresh SDK folder but rather just change the existing vivado hardware and then import the changed hardware platform without deleting the previous SDK folder. The easiest way to fix this is to click into the project folder and delete the .sdk folder. Then in Vivado 2018.3 re-export the hardware and launch sdk. Then create a new application and add the main.c from the example folder in the Pmod HYGRO IP Core to the scr folder in the application. Then program the FPGA and right click on the application selecting run as->launch oun hardware(system debugger). best regards, Jon Link to comment Share on other sites More sharing options...
Dom_123 Posted March 27, 2019 Author Share Posted March 27, 2019 @jpeyron Unfortunately it appears that this hasn't made a difference. This screenshot shows this. thanks, Dom. Link to comment Share on other sites More sharing options...
jpeyron Posted March 27, 2019 Share Posted March 27, 2019 Hi @Dom_123, Also looking at your picture setup, I also noticed that you left the mode jumper (JP1) floating. The mode jumper (JP1) is on the top right of the Basys 3 close to Pmod Port JB where you have the Pmod HYGRO connected. You need to set the mode to JTAG using a jumper on the two middle pins or shorting the middle two pins together with metal wire before programming the FPGA and running the SDK Application. best regards, Jon Link to comment Share on other sites More sharing options...
Dom_123 Posted March 27, 2019 Author Share Posted March 27, 2019 Hi@jpeyron, I have moved a jumper from the Pmod HYGRO to the JTAG position as mentioned and the values are still the same. Will removing a JTAG from the HYGRO be detremental? thanks, Dom. Link to comment Share on other sites More sharing options...
jpeyron Posted March 27, 2019 Share Posted March 27, 2019 Hi @Dom_123, Removing a I2C pullup resistor on the Pmod HYGRO will cause the pmod to not work. If you do not have a blue jumper then wrap a metal wire around the two intended jumper pins. Make sure there is no part of the metal wire is connecting to anything else. thank you, Jon Link to comment Share on other sites More sharing options...
Dom_123 Posted March 27, 2019 Author Share Posted March 27, 2019 I have wrapped a metal wire around the jumper pins for the SDA on the HYGRO, reprogrammed the FPGA and re ran the main.c and the numbers printed to the serial haven't changed. Sorry for making this such a task, I know it should be straightforward. thanks again, Dom. Link to comment Share on other sites More sharing options...
jpeyron Posted March 27, 2019 Share Posted March 27, 2019 Hi @Dom_123, I have attached screen shots for my exact process from vivado/SDK 2018.3 as well as a picture of my setup. Here is a verified Vivado 2018.3 basys 3 Pmod HYGRO. 1) Please download my Vivado 2018.3 project then launch the SDK. 2) Open Tera Term and connect the basys 3. 3) Next in SDK program the FPGA and right click on the application and select run as-> launch on hardware(system debugger). 4) does the project run as expected. 5) Looking through my process is there something that is different than what you have done? 6) Could you try making a new project from scratch? 7) Does it still have the same issues? best regards, Jon basys3_pmodHYGRO.zip Link to comment Share on other sites More sharing options...
Dom_123 Posted March 27, 2019 Author Share Posted March 27, 2019 Out of interest, should the TX led be flashing to say that the fpga is transferring data? as only the RX led is flashing when the board is programmed. Dom. Link to comment Share on other sites More sharing options...
Dom_123 Posted March 27, 2019 Author Share Posted March 27, 2019 Running the given file gives the same data as i have always received. These critical warnings appear when I load up the Block design, similar to warnings i had the last time i tried using one of your designs. Thoughts? Thanks, Dom. Link to comment Share on other sites More sharing options...
jpeyron Posted March 28, 2019 Share Posted March 28, 2019 Hi @Dom_123, These errors should only show up if you open the block design in the Vivado project( the errors are because vivado can not find the IP cores as well as the Pmod Bridge and IF folder linked in the IP repository. The path for the repository needs to be updated to where your unzipped Vivado library folder is on your PC). We would like to check the Basys 3/Pmod HYGRO using a pre-done project. To do this all you need to do is launch the project(make sure it is a freshly unzipped project that has not been opened on your PC before) and then in Vivado click on file and launch SDK. I was having you launch the vivado project to more easily launch the sdk application and SDK portion of the complete project. Now open tera term and have it connected to the com port of the basys 3. Next , in SDK Program the FPGA, and then right click on the already created application and select run as-> launch on hardware(system debugger). make sure the basys 3 is set to jtag mode and both of the pull up resitors are shorted on the Pmod HYGRO. Also make sure that you are plugging in the Pmod HYGRO on the top row of Pmod Port JB. Do you get good data in tera term? best regards, Jon Link to comment Share on other sites More sharing options...
Dom_123 Posted March 27, 2019 Author Share Posted March 27, 2019 @jpeyron, The Main.c file used is the exact same file provided in the example with absolutely no changes. I am using default programming settings when i program the FPGA. I am also using the run as launch on hardware (system debugger). I am not changing any of the SDK settings. I am using windows 10, will that make any difference? I have attached a screenshot of the project explore window. thanks, Dom. Link to comment Share on other sites More sharing options...
JColvin Posted March 28, 2019 Share Posted March 28, 2019 Hi @Dom_123, If you understand the block design errors, does this mean that you have started a fresh project and resolved the path errors to the Vivado Library folder? Thanks, JColvin Link to comment Share on other sites More sharing options...
Dom_123 Posted March 28, 2019 Author Share Posted March 28, 2019 4 minutes ago, JColvin said: Hi @Dom_123, If you understand the block design errors, does this mean that you have started a fresh project and resolved the path errors to the Vivado Library folder? Thanks, JColvin These block errors have only occurred when opening a design made by @jpeyron, when I create my own block designs i have no such errors. I do get the errors that are inevitable and because the Pmod IP's were created using another board but they are the only errors i receive when creating my own design and i understand they can be ignored? What i dont understand is why i am receiving any printed data at all? where does this data originate as it is clearly a loop that isn't accurate? Thanks, Dom. Link to comment Share on other sites More sharing options...
JColvin Posted March 28, 2019 Share Posted March 28, 2019 Hi @Dom_123, I created my own separate project using the Basys 3 and Pmod HYGRO and was able to successfully receive accurate data. We are looking further into your situation to see what could be different, since the data pulls from a register that the read function sends to. Thanks, JColvin Link to comment Share on other sites More sharing options...
Dom_123 Posted March 28, 2019 Author Share Posted March 28, 2019 3 minutes ago, JColvin said: Hi @Dom_123, I created my own separate project using the Basys 3 and Pmod HYGRO and was able to successfully receive accurate data. We are looking further into your situation to see what could be different, since the data pulls from a register that the read function sends to. Thanks, JColvin Hi JColvin, Would you like me to send in one of my fully completed projects that is printing the wrong/bad data? If so, please advise on how to do so as the zipped file is too large to send on this forum. thanks again, Dom. Link to comment Share on other sites More sharing options...
JColvin Posted March 29, 2019 Share Posted March 29, 2019 Hi @Dom_123, I would probably recommend dropbox or something similar since the people who manage the server side of things over at Digilent don't want to increase the file size options for uploading to the forum. I do have another thing that we can do to test the HYGRO functionality; mostly I added a function to the demo code that reads the device ID of the embedded chip in the Pmod HYGRO since that will be a constant value and should (ideally) help point towards where the issue might be. I have attached the 3 relevant files so if you could replace the main.c in the application project (under it's respective source file) and PmodHYGRO.c and .h files in wrapper_hw_platform (drivers -> PmodHYGRO_v1_0 -> src) with the their respective files (or at least the contents), save the changes, and then relaunch the application on the hardware (after programming the FPGA with the bitstream). What you should see in the serial terminal is: "DevID: 0x1050 is devID" followed by the temperature and humidity data on each line. Thank you, JColvin PmodHYGRO.c PmodHYGRO.h main.c Link to comment Share on other sites More sharing options...
Dom_123 Posted March 30, 2019 Author Share Posted March 30, 2019 21 hours ago, JColvin said: Hi @Dom_123, I would probably recommend dropbox or something similar since the people who manage the server side of things over at Digilent don't want to increase the file size options for uploading to the forum. I do have another thing that we can do to test the HYGRO functionality; mostly I added a function to the demo code that reads the device ID of the embedded chip in the Pmod HYGRO since that will be a constant value and should (ideally) help point towards where the issue might be. I have attached the 3 relevant files so if you could replace the main.c in the application project (under it's respective source file) and PmodHYGRO.c and .h files in wrapper_hw_platform (drivers -> PmodHYGRO_v1_0 -> src) with the their respective files (or at least the contents), save the changes, and then relaunch the application on the hardware (after programming the FPGA with the bitstream). What you should see in the serial terminal is: "DevID: 0x1050 is devID" followed by the temperature and humidity data on each line. Thank you, JColvin PmodHYGRO.c 12.55 kB · 0 downloads PmodHYGRO.h 3.39 kB · 0 downloads main.c 4.64 kB · 0 downloads Hi @JColvin, Good idea ill do that now and let you know what results i get! thanks, Dom. Link to comment Share on other sites More sharing options...
Dom_123 Posted March 30, 2019 Author Share Posted March 30, 2019 21 hours ago, JColvin said: Hi @Dom_123, I would probably recommend dropbox or something similar since the people who manage the server side of things over at Digilent don't want to increase the file size options for uploading to the forum. I do have another thing that we can do to test the HYGRO functionality; mostly I added a function to the demo code that reads the device ID of the embedded chip in the Pmod HYGRO since that will be a constant value and should (ideally) help point towards where the issue might be. I have attached the 3 relevant files so if you could replace the main.c in the application project (under it's respective source file) and PmodHYGRO.c and .h files in wrapper_hw_platform (drivers -> PmodHYGRO_v1_0 -> src) with the their respective files (or at least the contents), save the changes, and then relaunch the application on the hardware (after programming the FPGA with the bitstream). What you should see in the serial terminal is: "DevID: 0x1050 is devID" followed by the temperature and humidity data on each line. Thank you, JColvin PmodHYGRO.c 12.55 kB · 0 downloads PmodHYGRO.h 3.39 kB · 0 downloads main.c 4.64 kB · 0 downloads @JColvin, Okay so this is the device ID that is printed to the serial term, also the temp and humid readings have changed? thanks. Dom. Link to comment Share on other sites More sharing options...
JColvin Posted April 1, 2019 Share Posted April 1, 2019 Hi @Dom_123, Would you be able to upload your zipped project to either dropbox or google drive or something similar? The fact that you are now getting 0's for the temperature and humidity indicates that your Pmod HYGRO might be damaged, though this will help verify this for certain. Additionally, did you put the source and header files in the wrapper rather than just the application like it shows in your screenshot? Thanks, JColvin Link to comment Share on other sites More sharing options...
Dom_123 Posted April 1, 2019 Author Share Posted April 1, 2019 https://drive.google.com/file/d/18Qq-i30QLaWpy-GERYBjzVCD5taxFdHT/view?usp=sharing Try this as a link to downlaod my zipped file. Thanks, Dom. Link to comment Share on other sites More sharing options...
jpeyron Posted April 2, 2019 Share Posted April 2, 2019 Hi @Dom_123, I ran your project with no issues today. I got the correct device ID and usable temp/humidity. It sounds like a hardware issue. I have sent you a PM about the next steps. best regards, Jon Link to comment Share on other sites More sharing options...
Dom_123 Posted March 25, 2019 Author Share Posted March 25, 2019 Hi @jpeyron, No worries, thank you for your continued support ill try running that now. Just trying to run a basic Wi-Fi scan example to make sure the Wi-Fi module is connected and working as it should for now before digging any further. thanks again, Dom. Link to comment Share on other sites More sharing options...
jpeyron Posted March 21, 2019 Share Posted March 21, 2019 Hi @Dom_123, Welcome to the Digilent Forums! I split this thread and started a new topic since its with a different board. This sounds like an interesting project. You will need to use an SD card reader something like the Pmod MicroSD to use the HTTPServer example for the Pmod WIFI IP Core. You should not need an SD card for the other Pmod WIFI IP Core examples. best regards, Jon Link to comment Share on other sites More sharing options...
Dom_123 Posted March 21, 2019 Author Share Posted March 21, 2019 Thanks for the quick reply! @jpeyron, Where can I find the Pmod WiFi IP Core examples? Also, in regards to the Pmod Hygro, using the example provided doesn't appear to generate actual temperature and humidity data. The example instead prints a range of readings to the serial term and doesn't use the sensor itself at all by the looks of things. Any help with collecting actual humidity and temperature data would also be greatly appreciated! Thanks, Dom. Link to comment Share on other sites More sharing options...
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Dom_123
Hi @jpeyron,
I am also attempting to send Pmod Hygro data to a PC (or to the cloud) using the Pmod WiFi. Do I need an SD card for this to be possible (like in the tutorial) or is there another way. I'm using the BASYS 3 FPGA
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