I possess an PmodAD1 converter device. Already acquainted with the PmodAD1 and AD7476A data sheets, I have a question about the practical application:
Given an analogue input signal, what is the most optimal-or the most simple yet working-way to provide the CS and Clk signals for the AD1 PMOD? Is that assumed that CS and Clk are generated by the FPGA board?
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Hello!
I possess an PmodAD1 converter device. Already acquainted with the PmodAD1 and AD7476A data sheets, I have a question about the practical application:
Given an analogue input signal, what is the most optimal-or the most simple yet working-way to provide the CS and Clk signals for the AD1 PMOD? Is that assumed that CS and Clk are generated by the FPGA board?
Thank you,
Your customer.
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