kamal Posted March 14, 2019 Share Posted March 14, 2019 good morning, I want to make an eye scan(eye diagram) for the GTX transceiver of virtex5, I want to know the possible approachs to achieve it. thank you for your help Link to comment Share on other sites More sharing options...
zygot Posted March 14, 2019 Share Posted March 14, 2019 @kamal Xilinx usually provides demo projects to do this for its transceiver capable boards. Go to the Xilinx website and search for a Xilinx board with transceivers on and FMC or SMT connector and look through the list of demo projects. Link to comment Share on other sites More sharing options...
kamal Posted March 15, 2019 Author Share Posted March 15, 2019 thank you for your help the solution given by xilinx needs the board (virtex5), that i will have it later. i am asking now if there is any other way to achieve the eye scan. thank you, Link to comment Share on other sites More sharing options...
zygot Posted March 15, 2019 Share Posted March 15, 2019 3 hours ago, kamal said: solution given by xilinx needs the board (virtex5) I directed you to the Xilinx website to see how they do it, not to provide a canned solution. You don't need to restrict yourself to Virtex5 implementations to get the ideas. Generally, if I use this method I end up creating a project that better suits my needs. There are a lot of aspects of the Virtex5 device that make using the advanced features more challenging to me since I've been working with Series7 devices. Link to comment Share on other sites More sharing options...
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kamal
good morning,
I want to make an eye scan(eye diagram) for the GTX transceiver of virtex5, I want to know the possible approachs to achieve it.
thank you for your help
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