Zybo Z7 -20 Board OpenCV Fucntions

Sameer120 · March 13, 2019

Hello,

I ran the Digilent Demo (Zybo Z7-20 reVISION Platform) on FPGA, but i want to modify the OpenCV functions and I am trying to run some more OpenCV funtions but getting some errors.

Is there any project I can use that have opencv function like to find some contours and mark a border on that like Suqare of Circles. The other think I want to implement is to find Bright Spot in the live video stream.

I am ok with running anything like OpenCV on SDSoC or XFOpenCV using HLS, I try to run the Xilinx Examples but thoes are for ZCU102/4 Boards.

It would be really helpful if someone can help me with this implementation of OpenCV function like Canny, findcontors and drawing line circle or sqaure on shapes.

Thanks & Regards

Sameer

Sameer120 · March 14, 2019

Yes, I followed all the steps

I created SYSROOT environment variable

Then Restarted the PC after variable creation

bogdan.deac · April 15, 2019

Hello,

Unfortunately, I cannot reproduce the error that you get. In this point I have two suggestions:

1. Try to build the project on a linux-based system, maybe using a virtual machine (this will slow down the building process).

2. Post this issue on Xilinx forum. They should have a better knowledge about the errors that may appear on Windows-based systems.

Best regards,

Bogdan D.

Sameer120 · March 25, 2019

Hello,

Thanks for the update, I do get similar error of missing files earlier it showed windows path (260 length) issue then i reduce the path but still it fails saying not able to find some file as you can see it in my log file attached earlier in thread.

I really appericate your help, do let me know once you get a solution.

Thanks

Sameer

bogdan.deac · March 25, 2019

Hello,

I have some troubles to build the project in SDx on Windows. I get a weird error message:

The system cannot find the file specified.

This message appears for every project that I try to build using Zybo Z7 reVision platform. It seems to be a configuration issue. I am working to solve this. I didn't face this problem on Linux before.

Sameer120 · March 21, 2019

Hi,

Yes I tried it on Windows 10, using Xilinx SDx 2017.4.

Core i7 with 8GB RAM

Please let me know if you need any more information from me.

Thanks & Regards

Sameer

bogdan.deac · March 20, 2019

Hi,

I am trying to reproduce your error. On Linux-based system everything works fine. I am going to try on Windows as well. I will come back with a response as soon as possible.

Sameer120 · March 18, 2019

Hi,

I checked that, No this path is not avilable, but this is created by the scripts and not manually, still I tried creating this manually but when I rerun it just delete and start again, even if i dont clean the build.

Thanks

Sameer

bogdan.deac · March 18, 2019

Hi,

Vivado can't find 'c:/LS1/LS1/Debug/_sds/p0/_vpl/zybo_z7_20.ipdefs/repo_0'. Can you verify that the path is valid? Can you reach repo_0 directory from File Explorer? What does repo_0 directory contain?

Sameer120 · March 15, 2019

Hi,

Thanks for sharing the information, I am not sure how to use this TCL command in SDx 2017.4, I tried below command on SDx Terminal but its not working

Spoiler

"exec subst V: C:\LS1\LS1 create_project LS1 V:/LS1 -part XC7Z020-1CLG400C set_property board zybo_z7_20 [current_project] "

Then I reduce my path to very small as C:\LS1 (Minimum 3 letters are required) but I am getting below errors its also saying that no IP found, but not saying about 260 letters

I am attaching all the logs

/***********************************************SDx Console Log************************************************/

01:33:04 **** Build of configuration Debug for project LS1 ****
make pre-build main-build
sdsoc_make_clean Debug
' '
'Building file: ../src/v4l2_helper/v4l2_helper.cpp'
'Invoking: SDS++ Compiler'
sds++ -DHLS_NO_XIL_FPO_LIB -D__ARM_PCS_VFP -Wall -O0 -g -I"../src" -IC:\LS1\zybo_z7_20/sw/linux/linux/inc/include -c -fmessage-length=0 -MT"src/v4l2_helper/v4l2_helper.o" -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include/c++/6.2.1 -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include/c++/6.2.1/arm-xilinx-linux-gnueabi -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include/c++/6.2.1/backward -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include/glib-2.0 -IC:\LS1\zybo_z7_20\sw\sysroot/usr/lib/glib-2.0/include -Wno-overloaded-virtual -Wno-unused-label -Wno-strict-overflow -Wno-uninitialized -Wno-unused-function -Wno-unused-variable -Wno-unknown-attributes -Wno-unused-local-typedefs -Wno-sign-compare -MMD -MP -MF"src/v4l2_helper/v4l2_helper.d" -MT"src/v4l2_helper/v4l2_helper.o" -o "src/v4l2_helper/v4l2_helper.o" "../src/v4l2_helper/v4l2_helper.cpp" -sds-hw "xf::filter2D<0,3,3,0,0,1080,1920,1>" filter2d_xf.cpp -files C:/LS1/zybo_z7_20/sw/linux/linux/inc/include/imgproc/xf_custom_convolution.hpp -clkid 0 -sds-end -sds-hw write_output_gray hls_helper.cpp -clkid 0 -sds-end -sds-sys-config linux -sds-proc linux -sds-pf "C:\LS1\zybo_z7_20"
Validating feature ap_sdsoc
License available for feature ap_sdsoc
Your ap_sdsoc license expires in 18 day(s)
Create data motion intermediate representation

C:\LS1\LS1\Debug>C:\Xilinx\SDx\2017.4\llvm-clang\win64\llvm\bin\clang.exe -I../src -IC:\LS1\zybo_z7_20/sw/linux/linux/inc/include -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include/c++/6.2.1 -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include/c++/6.2.1/arm-xilinx-linux-gnueabi -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include/c++/6.2.1/backward -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include/glib-2.0 -IC:\LS1\zybo_z7_20\sw\sysroot/usr/lib/glib-2.0/include -DHLS_NO_XIL_FPO_LIB -D__ARM_PCS_VFP -Wall -g -fmessage-length=0 -Wno-overloaded-virtual -Wno-unused-label -Wno-strict-overflow -Wno-uninitialized -Wno-unused-function -Wno-unused-variable -Wno-unknown-attributes -Wno-unused-local-typedefs -Wno-sign-compare -MMD -MP -D __SDSCC__ -target arm-linux-gnueabihf -mcpu=cortex-a9 -mfpu=vfpv3 -mfloat-abi=hard -O0 -g -I C:/LS1/zybo_z7_20/sw/linux/linux/inc/include -I C:/Xilinx/SDx/2017.4/target/aarch32-linux/include -D HLS_NO_XIL_FPO_LIB -I C:/Xilinx/Vivado/2017.4/include -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include/c++/6.2.1 -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include/c++/6.2.1/arm-linux-gnueabihf -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include/c++/6.2.1/backward -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/lib/gcc/arm-linux-gnueabihf/6.2.1/include -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/lib/gcc/arm-linux-gnueabihf/6.2.1/include-fixed -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/libc/usr/include -std=c++11 -emit-llvm -S C:/LS1/LS1/src/v4l2_helper/v4l2_helper.cpp -o C:/LS1/LS1/Debug/_sds/.llvm/src/v4l2_helper/v4l2_helper.s
C:/LS1/LS1/src/v4l2_helper/v4l2_helper.cpp:64:53: warning: suggest braces around initialization of subobject [-Wmissing-braces]
struct v4l2_plane planes[VIDEO_MAX_PLANES] = { 0 };
^
{}

C:\LS1\LS1\Debug>exit /b 0
Compiling C:/LS1/LS1/src/v4l2_helper/v4l2_helper.cpp
sds++ log file saved as C:/LS1/LS1/Debug/_sds/reports/sds_v4l2_helper.log

'Finished building: ../src/v4l2_helper/v4l2_helper.cpp'
' '
'Building file: ../src/uio/uio_ll.cpp'
'Invoking: SDS++ Compiler'
sds++ -DHLS_NO_XIL_FPO_LIB -D__ARM_PCS_VFP -Wall -O0 -g -I"../src" -IC:\LS1\zybo_z7_20/sw/linux/linux/inc/include -c -fmessage-length=0 -MT"src/uio/uio_ll.o" -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include/c++/6.2.1 -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include/c++/6.2.1/arm-xilinx-linux-gnueabi -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include/c++/6.2.1/backward -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include/glib-2.0 -IC:\LS1\zybo_z7_20\sw\sysroot/usr/lib/glib-2.0/include -Wno-overloaded-virtual -Wno-unused-label -Wno-strict-overflow -Wno-uninitialized -Wno-unused-function -Wno-unused-variable -Wno-unknown-attributes -Wno-unused-local-typedefs -Wno-sign-compare -MMD -MP -MF"src/uio/uio_ll.d" -MT"src/uio/uio_ll.o" -o "src/uio/uio_ll.o" "../src/uio/uio_ll.cpp" -sds-hw "xf::filter2D<0,3,3,0,0,1080,1920,1>" filter2d_xf.cpp -files C:/LS1/zybo_z7_20/sw/linux/linux/inc/include/imgproc/xf_custom_convolution.hpp -clkid 0 -sds-end -sds-hw write_output_gray hls_helper.cpp -clkid 0 -sds-end -sds-sys-config linux -sds-proc linux -sds-pf "C:\LS1\zybo_z7_20"
Validating feature ap_sdsoc
License available for feature ap_sdsoc
Your ap_sdsoc license expires in 18 day(s)
Create data motion intermediate representation

C:\LS1\LS1\Debug>C:\Xilinx\SDx\2017.4\llvm-clang\win64\llvm\bin\clang.exe -I../src -IC:\LS1\zybo_z7_20/sw/linux/linux/inc/include -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include/c++/6.2.1 -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include/c++/6.2.1/arm-xilinx-linux-gnueabi -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include/c++/6.2.1/backward -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include/glib-2.0 -IC:\LS1\zybo_z7_20\sw\sysroot/usr/lib/glib-2.0/include -DHLS_NO_XIL_FPO_LIB -D__ARM_PCS_VFP -Wall -g -fmessage-length=0 -Wno-overloaded-virtual -Wno-unused-label -Wno-strict-overflow -Wno-uninitialized -Wno-unused-function -Wno-unused-variable -Wno-unknown-attributes -Wno-unused-local-typedefs -Wno-sign-compare -MMD -MP -D __SDSCC__ -target arm-linux-gnueabihf -mcpu=cortex-a9 -mfpu=vfpv3 -mfloat-abi=hard -O0 -g -I C:/LS1/zybo_z7_20/sw/linux/linux/inc/include -I C:/Xilinx/SDx/2017.4/target/aarch32-linux/include -D HLS_NO_XIL_FPO_LIB -I C:/Xilinx/Vivado/2017.4/include -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include/c++/6.2.1 -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include/c++/6.2.1/arm-linux-gnueabihf -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include/c++/6.2.1/backward -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/lib/gcc/arm-linux-gnueabihf/6.2.1/include -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/lib/gcc/arm-linux-gnueabihf/6.2.1/include-fixed -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/libc/usr/include -std=c++11 -emit-llvm -S C:/LS1/LS1/src/uio/uio_ll.cpp -o C:/LS1/LS1/Debug/_sds/.llvm/src/uio/uio_ll.s

C:\LS1\LS1\Debug>exit /b 0
Compiling C:/LS1/LS1/src/uio/uio_ll.cpp
sds++ log file saved as C:/LS1/LS1/Debug/_sds/reports/sds_uio_ll.log

'Finished building: ../src/uio/uio_ll.cpp'
' '
'Building file: ../src/hls_helper/hls_helper.cpp'
'Invoking: SDS++ Compiler'
sds++ -DHLS_NO_XIL_FPO_LIB -D__ARM_PCS_VFP -Wall -O0 -g -I"../src" -IC:\LS1\zybo_z7_20/sw/linux/linux/inc/include -c -fmessage-length=0 -MT"src/hls_helper/hls_helper.o" -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include/c++/6.2.1 -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include/c++/6.2.1/arm-xilinx-linux-gnueabi -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include/c++/6.2.1/backward -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include/glib-2.0 -IC:\LS1\zybo_z7_20\sw\sysroot/usr/lib/glib-2.0/include -Wno-overloaded-virtual -Wno-unused-label -Wno-strict-overflow -Wno-uninitialized -Wno-unused-function -Wno-unused-variable -Wno-unknown-attributes -Wno-unused-local-typedefs -Wno-sign-compare -MMD -MP -MF"src/hls_helper/hls_helper.d" -MT"src/hls_helper/hls_helper.o" -o "src/hls_helper/hls_helper.o" "../src/hls_helper/hls_helper.cpp" -sds-hw "xf::filter2D<0,3,3,0,0,1080,1920,1>" filter2d_xf.cpp -files C:/LS1/zybo_z7_20/sw/linux/linux/inc/include/imgproc/xf_custom_convolution.hpp -clkid 0 -sds-end -sds-hw write_output_gray hls_helper.cpp -clkid 0 -sds-end -sds-sys-config linux -sds-proc linux -sds-pf "C:\LS1\zybo_z7_20"
Processing -sds-hw block for write_output_gray
Validating feature ap_sdsoc
License available for feature ap_sdsoc
Your ap_sdsoc license expires in 18 day(s)
Create data motion intermediate representation

C:\LS1\LS1\Debug>C:\Xilinx\SDx\2017.4\llvm-clang\win64\llvm\bin\clang.exe -I../src -IC:\LS1\zybo_z7_20/sw/linux/linux/inc/include -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include/c++/6.2.1 -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include/c++/6.2.1/arm-xilinx-linux-gnueabi -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include/c++/6.2.1/backward -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include/glib-2.0 -IC:\LS1\zybo_z7_20\sw\sysroot/usr/lib/glib-2.0/include -DHLS_NO_XIL_FPO_LIB -D__ARM_PCS_VFP -Wall -g -fmessage-length=0 -Wno-overloaded-virtual -Wno-unused-label -Wno-strict-overflow -Wno-uninitialized -Wno-unused-function -Wno-unused-variable -Wno-unknown-attributes -Wno-unused-local-typedefs -Wno-sign-compare -MMD -MP -D __SDSCC__ -target arm-linux-gnueabihf -mcpu=cortex-a9 -mfpu=vfpv3 -mfloat-abi=hard -O0 -g -I C:/LS1/zybo_z7_20/sw/linux/linux/inc/include -I C:/Xilinx/SDx/2017.4/target/aarch32-linux/include -D HLS_NO_XIL_FPO_LIB -I C:/Xilinx/Vivado/2017.4/include -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include/c++/6.2.1 -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include/c++/6.2.1/arm-linux-gnueabihf -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include/c++/6.2.1/backward -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/lib/gcc/arm-linux-gnueabihf/6.2.1/include -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/lib/gcc/arm-linux-gnueabihf/6.2.1/include-fixed -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/libc/usr/include -std=c++11 -emit-llvm -S C:/LS1/LS1/src/hls_helper/hls_helper.cpp -o C:/LS1/LS1/Debug/_sds/.llvm/src/hls_helper/hls_helper.s

C:\LS1\LS1\Debug>exit /b 0
Performing accelerator source linting for write_output_gray
Performing pragma generation

C:\LS1\LS1\Debug>C:\Xilinx\SDx\2017.4\llvm-clang\win64\llvm\bin\clang.exe -E -IC:/LS1/LS1/src -IC:/LS1/zybo_z7_20/sw/linux/linux/inc/include -IC:/LS1/zybo_z7_20/sw/sysroot/usr/include/c++/6.2.1 -IC:/LS1/zybo_z7_20/sw/sysroot/usr/include/c++/6.2.1/arm-xilinx-linux-gnueabi -IC:/LS1/zybo_z7_20/sw/sysroot/usr/include/c++/6.2.1/backward -IC:/LS1/zybo_z7_20/sw/sysroot/usr/include -IC:/LS1/zybo_z7_20/sw/sysroot/usr/include/glib-2.0 -IC:/LS1/zybo_z7_20/sw/sysroot/usr/lib/glib-2.0/include -DHLS_NO_XIL_FPO_LIB -D__ARM_PCS_VFP -Wall -g -fmessage-length=0 -Wno-overloaded-virtual -Wno-unused-label -Wno-strict-overflow -Wno-uninitialized -Wno-unused-function -Wno-unused-variable -Wno-unknown-attributes -Wno-unused-local-typedefs -Wno-sign-compare -MMD -MP -D __SDSCC__ -m32 -I C:/LS1/zybo_z7_20/sw/linux/linux/inc/include -D HLS_NO_XIL_FPO_LIB -I C:/Xilinx/SDx/2017.4/target/aarch32-linux/include -IC:/LS1/LS1/src/hls_helper -D __SDSVHLS__ -target arm-linux-gnueabihf -mcpu=cortex-a9 -mfpu=vfpv3 -mfloat-abi=hard -O0 -g -w -I C:/LS1/zybo_z7_20/sw/linux/linux/inc/include -I C:/Xilinx/SDx/2017.4/target/aarch32-linux/include -D HLS_NO_XIL_FPO_LIB -I C:/Xilinx/Vivado/2017.4/include -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include/c++/6.2.1 -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include/c++/6.2.1/arm-linux-gnueabihf -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include/c++/6.2.1/backward -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/lib/gcc/arm-linux-gnueabihf/6.2.1/include -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/lib/gcc/arm-linux-gnueabihf/6.2.1/include-fixed -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/libc/usr/include -std=c++11 C:/LS1/LS1/src/hls_helper/hls_helper.cpp -o C:/LS1/LS1/Debug/_sds/vhls/hls_helper_pp.cpp

C:\LS1\LS1\Debug>exit /b 0
INFO: [PragmaGen 83-3231] Successfully generated tcl script: C:/LS1/LS1/Debug/_sds/vhls/write_output_gray.tcl
Moving function write_output_gray to Programmable Logic
sds++ log file saved as C:/LS1/LS1/Debug/_sds/reports/sds_hls_helper.log

'Finished building: ../src/hls_helper/hls_helper.cpp'
' '
'Building file: ../src/filter2d/filter2d_cv.cpp'
'Invoking: SDS++ Compiler'
sds++ -DHLS_NO_XIL_FPO_LIB -D__ARM_PCS_VFP -Wall -O0 -g -I"../src" -IC:\LS1\zybo_z7_20/sw/linux/linux/inc/include -c -fmessage-length=0 -MT"src/filter2d/filter2d_cv.o" -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include/c++/6.2.1 -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include/c++/6.2.1/arm-xilinx-linux-gnueabi -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include/c++/6.2.1/backward -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include/glib-2.0 -IC:\LS1\zybo_z7_20\sw\sysroot/usr/lib/glib-2.0/include -Wno-overloaded-virtual -Wno-unused-label -Wno-strict-overflow -Wno-uninitialized -Wno-unused-function -Wno-unused-variable -Wno-unknown-attributes -Wno-unused-local-typedefs -Wno-sign-compare -MMD -MP -MF"src/filter2d/filter2d_cv.d" -MT"src/filter2d/filter2d_cv.o" -o "src/filter2d/filter2d_cv.o" "../src/filter2d/filter2d_cv.cpp" -sds-hw "xf::filter2D<0,3,3,0,0,1080,1920,1>" filter2d_xf.cpp -files C:/LS1/zybo_z7_20/sw/linux/linux/inc/include/imgproc/xf_custom_convolution.hpp -clkid 0 -sds-end -sds-hw write_output_gray hls_helper.cpp -clkid 0 -sds-end -sds-sys-config linux -sds-proc linux -sds-pf "C:\LS1\zybo_z7_20"
Validating feature ap_sdsoc
License available for feature ap_sdsoc
Your ap_sdsoc license expires in 18 day(s)
Create data motion intermediate representation

C:\LS1\LS1\Debug>C:\Xilinx\SDx\2017.4\llvm-clang\win64\llvm\bin\clang.exe -I../src -IC:\LS1\zybo_z7_20/sw/linux/linux/inc/include -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include/c++/6.2.1 -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include/c++/6.2.1/arm-xilinx-linux-gnueabi -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include/c++/6.2.1/backward -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include/glib-2.0 -IC:\LS1\zybo_z7_20\sw\sysroot/usr/lib/glib-2.0/include -DHLS_NO_XIL_FPO_LIB -D__ARM_PCS_VFP -Wall -g -fmessage-length=0 -Wno-overloaded-virtual -Wno-unused-label -Wno-strict-overflow -Wno-uninitialized -Wno-unused-function -Wno-unused-variable -Wno-unknown-attributes -Wno-unused-local-typedefs -Wno-sign-compare -MMD -MP -D __SDSCC__ -target arm-linux-gnueabihf -mcpu=cortex-a9 -mfpu=vfpv3 -mfloat-abi=hard -O0 -g -I C:/LS1/zybo_z7_20/sw/linux/linux/inc/include -I C:/Xilinx/SDx/2017.4/target/aarch32-linux/include -D HLS_NO_XIL_FPO_LIB -I C:/Xilinx/Vivado/2017.4/include -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include/c++/6.2.1 -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include/c++/6.2.1/arm-linux-gnueabihf -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include/c++/6.2.1/backward -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/lib/gcc/arm-linux-gnueabihf/6.2.1/include -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/lib/gcc/arm-linux-gnueabihf/6.2.1/include-fixed -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/libc/usr/include -std=c++11 -emit-llvm -S C:/LS1/LS1/src/filter2d/filter2d_cv.cpp -o C:/LS1/LS1/Debug/_sds/.llvm/src/filter2d/filter2d_cv.s

C:\LS1\LS1\Debug>exit /b 0
Compiling C:/LS1/LS1/src/filter2d/filter2d_cv.cpp
sds++ log file saved as C:/LS1/LS1/Debug/_sds/reports/sds_filter2d_cv.log

'Finished building: ../src/filter2d/filter2d_cv.cpp'
' '
'Building file: ../src/filter2d/filter2d_xf.cpp'
'Invoking: SDS++ Compiler'
sds++ -DHLS_NO_XIL_FPO_LIB -D__ARM_PCS_VFP -Wall -O0 -g -I"../src" -IC:\LS1\zybo_z7_20/sw/linux/linux/inc/include -c -fmessage-length=0 -MT"src/filter2d/filter2d_xf.o" -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include/c++/6.2.1 -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include/c++/6.2.1/arm-xilinx-linux-gnueabi -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include/c++/6.2.1/backward -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include/glib-2.0 -IC:\LS1\zybo_z7_20\sw\sysroot/usr/lib/glib-2.0/include -Wno-overloaded-virtual -Wno-unused-label -Wno-strict-overflow -Wno-uninitialized -Wno-unused-function -Wno-unused-variable -Wno-unknown-attributes -Wno-unused-local-typedefs -Wno-sign-compare -MMD -MP -MF"src/filter2d/filter2d_xf.d" -MT"src/filter2d/filter2d_xf.o" -o "src/filter2d/filter2d_xf.o" "../src/filter2d/filter2d_xf.cpp" -sds-hw "xf::filter2D<0,3,3,0,0,1080,1920,1>" filter2d_xf.cpp -files C:/LS1/zybo_z7_20/sw/linux/linux/inc/include/imgproc/xf_custom_convolution.hpp -clkid 0 -sds-end -sds-hw write_output_gray hls_helper.cpp -clkid 0 -sds-end -sds-sys-config linux -sds-proc linux -sds-pf "C:\LS1\zybo_z7_20"
Processing -sds-hw block for xf::filter2D<0,3,3,0,0,1080,1920,1>
Validating feature ap_sdsoc
License available for feature ap_sdsoc
Your ap_sdsoc license expires in 18 day(s)
Create data motion intermediate representation

C:\LS1\LS1\Debug>C:\Xilinx\SDx\2017.4\llvm-clang\win64\llvm\bin\clang.exe -I../src -IC:\LS1\zybo_z7_20/sw/linux/linux/inc/include -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include/c++/6.2.1 -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include/c++/6.2.1/arm-xilinx-linux-gnueabi -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include/c++/6.2.1/backward -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include/glib-2.0 -IC:\LS1\zybo_z7_20\sw\sysroot/usr/lib/glib-2.0/include -DHLS_NO_XIL_FPO_LIB -D__ARM_PCS_VFP -Wall -g -fmessage-length=0 -Wno-overloaded-virtual -Wno-unused-label -Wno-strict-overflow -Wno-uninitialized -Wno-unused-function -Wno-unused-variable -Wno-unknown-attributes -Wno-unused-local-typedefs -Wno-sign-compare -MMD -MP -D __SDSCC__ -target arm-linux-gnueabihf -mcpu=cortex-a9 -mfpu=vfpv3 -mfloat-abi=hard -O0 -g -I C:/LS1/zybo_z7_20/sw/linux/linux/inc/include -I C:/Xilinx/SDx/2017.4/target/aarch32-linux/include -D HLS_NO_XIL_FPO_LIB -I C:/Xilinx/Vivado/2017.4/include -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include/c++/6.2.1 -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include/c++/6.2.1/arm-linux-gnueabihf -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include/c++/6.2.1/backward -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/lib/gcc/arm-linux-gnueabihf/6.2.1/include -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/lib/gcc/arm-linux-gnueabihf/6.2.1/include-fixed -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/libc/usr/include -std=c++11 -emit-llvm -S C:/LS1/LS1/src/filter2d/filter2d_xf.cpp -o C:/LS1/LS1/Debug/_sds/.llvm/src/filter2d/filter2d_xf.s

C:\LS1\LS1\Debug>exit /b 0
Performing accelerator source linting for w1_xf_filter2D
Performing pragma generation

C:\LS1\LS1\Debug>C:\Xilinx\SDx\2017.4\llvm-clang\win64\llvm\bin\clang.exe -E -IC:/LS1/LS1/src -IC:/LS1/zybo_z7_20/sw/linux/linux/inc/include -IC:/LS1/zybo_z7_20/sw/sysroot/usr/include/c++/6.2.1 -IC:/LS1/zybo_z7_20/sw/sysroot/usr/include/c++/6.2.1/arm-xilinx-linux-gnueabi -IC:/LS1/zybo_z7_20/sw/sysroot/usr/include/c++/6.2.1/backward -IC:/LS1/zybo_z7_20/sw/sysroot/usr/include -IC:/LS1/zybo_z7_20/sw/sysroot/usr/include/glib-2.0 -IC:/LS1/zybo_z7_20/sw/sysroot/usr/lib/glib-2.0/include -DHLS_NO_XIL_FPO_LIB -D__ARM_PCS_VFP -Wall -g -fmessage-length=0 -Wno-overloaded-virtual -Wno-unused-label -Wno-strict-overflow -Wno-uninitialized -Wno-unused-function -Wno-unused-variable -Wno-unknown-attributes -Wno-unused-local-typedefs -Wno-sign-compare -MMD -MP -D __SDSCC__ -m32 -I C:/LS1/zybo_z7_20/sw/linux/linux/inc/include -D HLS_NO_XIL_FPO_LIB -I C:/Xilinx/SDx/2017.4/target/aarch32-linux/include -IC:/LS1/LS1/src/filter2d -D __SDSVHLS__ -target arm-linux-gnueabihf -mcpu=cortex-a9 -mfpu=vfpv3 -mfloat-abi=hard -O0 -g -w -I C:/LS1/zybo_z7_20/sw/linux/linux/inc/include -I C:/Xilinx/SDx/2017.4/target/aarch32-linux/include -D HLS_NO_XIL_FPO_LIB -I C:/Xilinx/Vivado/2017.4/include -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include/c++/6.2.1 -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include/c++/6.2.1/arm-linux-gnueabihf -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include/c++/6.2.1/backward -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/lib/gcc/arm-linux-gnueabihf/6.2.1/include -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/lib/gcc/arm-linux-gnueabihf/6.2.1/include-fixed -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/libc/usr/include -std=c++11 C:/LS1/LS1/src/filter2d/filter2d_xf.cpp -o C:/LS1/LS1/Debug/_sds/vhls/filter2d_xf_pp.cpp

C:\LS1\LS1\Debug>exit /b 0
INFO: [PragmaGen 83-3231] Successfully generated tcl script: C:/LS1/LS1/Debug/_sds/vhls/w1_xf_filter2D.tcl
Moving function w1_xf_filter2D to Programmable Logic
sds++ log file saved as C:/LS1/LS1/Debug/_sds/reports/sds_filter2d_xf.log

'Finished building: ../src/filter2d/filter2d_xf.cpp'
' '
'Building file: ../src/drm_helper/drm_helper.cpp'
'Invoking: SDS++ Compiler'
sds++ -DHLS_NO_XIL_FPO_LIB -D__ARM_PCS_VFP -Wall -O0 -g -I"../src" -IC:\LS1\zybo_z7_20/sw/linux/linux/inc/include -c -fmessage-length=0 -MT"src/drm_helper/drm_helper.o" -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include/c++/6.2.1 -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include/c++/6.2.1/arm-xilinx-linux-gnueabi -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include/c++/6.2.1/backward -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include/glib-2.0 -IC:\LS1\zybo_z7_20\sw\sysroot/usr/lib/glib-2.0/include -Wno-overloaded-virtual -Wno-unused-label -Wno-strict-overflow -Wno-uninitialized -Wno-unused-function -Wno-unused-variable -Wno-unknown-attributes -Wno-unused-local-typedefs -Wno-sign-compare -MMD -MP -MF"src/drm_helper/drm_helper.d" -MT"src/drm_helper/drm_helper.o" -o "src/drm_helper/drm_helper.o" "../src/drm_helper/drm_helper.cpp" -sds-hw filter2D xf_custom_convolution.hpp -clkid 0 -sds-end -sds-hw write_output_gray hls_helper.cpp -clkid 0 -sds-end -sds-sys-config linux -sds-proc linux -sds-pf "C:\LS1\zybo_z7_20"
Validating feature ap_sdsoc
License available for feature ap_sdsoc
Your ap_sdsoc license expires in 18 day(s)
Create data motion intermediate representation

C:\LS1\LS1\Debug>C:\Xilinx\SDx\2017.4\llvm-clang\win64\llvm\bin\clang.exe -I../src -IC:\LS1\zybo_z7_20/sw/linux/linux/inc/include -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include/c++/6.2.1 -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include/c++/6.2.1/arm-xilinx-linux-gnueabi -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include/c++/6.2.1/backward -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include/glib-2.0 -IC:\LS1\zybo_z7_20\sw\sysroot/usr/lib/glib-2.0/include -DHLS_NO_XIL_FPO_LIB -D__ARM_PCS_VFP -Wall -g -fmessage-length=0 -Wno-overloaded-virtual -Wno-unused-label -Wno-strict-overflow -Wno-uninitialized -Wno-unused-function -Wno-unused-variable -Wno-unknown-attributes -Wno-unused-local-typedefs -Wno-sign-compare -MMD -MP -D __SDSCC__ -target arm-linux-gnueabihf -mcpu=cortex-a9 -mfpu=vfpv3 -mfloat-abi=hard -O0 -g -I C:/LS1/zybo_z7_20/sw/linux/linux/inc/include -I C:/Xilinx/SDx/2017.4/target/aarch32-linux/include -D HLS_NO_XIL_FPO_LIB -I C:/Xilinx/Vivado/2017.4/include -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include/c++/6.2.1 -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include/c++/6.2.1/arm-linux-gnueabihf -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include/c++/6.2.1/backward -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/lib/gcc/arm-linux-gnueabihf/6.2.1/include -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/lib/gcc/arm-linux-gnueabihf/6.2.1/include-fixed -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/libc/usr/include -std=c++11 -emit-llvm -S C:/LS1/LS1/src/drm_helper/drm_helper.cpp -o C:/LS1/LS1/Debug/_sds/.llvm/src/drm_helper/drm_helper.s

C:\LS1\LS1\Debug>exit /b 0
Compiling C:/LS1/LS1/src/drm_helper/drm_helper.cpp
sds++ log file saved as C:/LS1/LS1/Debug/_sds/reports/sds_drm_helper.log

'Finished building: ../src/drm_helper/drm_helper.cpp'
' '
'Building file: ../src/main.cpp'
'Invoking: SDS++ Compiler'
sds++ -DHLS_NO_XIL_FPO_LIB -D__ARM_PCS_VFP -Wall -O0 -g -I"../src" -IC:\LS1\zybo_z7_20/sw/linux/linux/inc/include -c -fmessage-length=0 -MT"src/main.o" -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include/c++/6.2.1 -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include/c++/6.2.1/arm-xilinx-linux-gnueabi -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include/c++/6.2.1/backward -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include/glib-2.0 -IC:\LS1\zybo_z7_20\sw\sysroot/usr/lib/glib-2.0/include -Wno-overloaded-virtual -Wno-unused-label -Wno-strict-overflow -Wno-uninitialized -Wno-unused-function -Wno-unused-variable -Wno-unknown-attributes -Wno-unused-local-typedefs -Wno-sign-compare -MMD -MP -MF"src/main.d" -MT"src/main.o" -o "src/main.o" "../src/main.cpp" -sds-hw "xf::filter2D<0,3,3,0,0,1080,1920,1>" filter2d_xf.cpp -files C:/LS1/zybo_z7_20/sw/linux/linux/inc/include/imgproc/xf_custom_convolution.hpp -clkid 0 -sds-end -sds-hw write_output_gray hls_helper.cpp -clkid 0 -sds-end -sds-sys-config linux -sds-proc linux -sds-pf "C:\LS1\zybo_z7_20"
Validating feature ap_sdsoc
License available for feature ap_sdsoc
Your ap_sdsoc license expires in 18 day(s)
Create data motion intermediate representation

C:\LS1\LS1\Debug>C:\Xilinx\SDx\2017.4\llvm-clang\win64\llvm\bin\clang.exe -I../src -IC:\LS1\zybo_z7_20/sw/linux/linux/inc/include -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include/c++/6.2.1 -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include/c++/6.2.1/arm-xilinx-linux-gnueabi -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include/c++/6.2.1/backward -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include -IC:\LS1\zybo_z7_20\sw\sysroot/usr/include/glib-2.0 -IC:\LS1\zybo_z7_20\sw\sysroot/usr/lib/glib-2.0/include -DHLS_NO_XIL_FPO_LIB -D__ARM_PCS_VFP -Wall -g -fmessage-length=0 -Wno-overloaded-virtual -Wno-unused-label -Wno-strict-overflow -Wno-uninitialized -Wno-unused-function -Wno-unused-variable -Wno-unknown-attributes -Wno-unused-local-typedefs -Wno-sign-compare -MMD -MP -D __SDSCC__ -target arm-linux-gnueabihf -mcpu=cortex-a9 -mfpu=vfpv3 -mfloat-abi=hard -O0 -g -I C:/LS1/zybo_z7_20/sw/linux/linux/inc/include -I C:/Xilinx/SDx/2017.4/target/aarch32-linux/include -D HLS_NO_XIL_FPO_LIB -I C:/Xilinx/Vivado/2017.4/include -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include/c++/6.2.1 -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include/c++/6.2.1/arm-linux-gnueabihf -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include/c++/6.2.1/backward -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/lib/gcc/arm-linux-gnueabihf/6.2.1/include -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/lib/gcc/arm-linux-gnueabihf/6.2.1/include-fixed -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/libc/usr/include -std=c++11 -emit-llvm -S C:/LS1/LS1/src/main.cpp -o C:/LS1/LS1/Debug/_sds/.llvm/src/main.s
C:/LS1/LS1/src/main.cpp:40:34: warning: ISO C++11 does not allow conversion from string literal to 'char *' [-Wwritable-strings]
v4l2_helper_open(&v4l2_help, V4L2_VIDEO_PATH);
^
../src/platform.h:16:25: note: expanded from macro 'V4L2_VIDEO_PATH'
#define V4L2_VIDEO_PATH "/dev/video0"
^

C:\LS1\LS1\Debug>exit /b 0
Compiling C:/LS1/LS1/src/main.cpp
from C:/LS1/LS1/src/filter2d/filter2d_xf.h:13,
from C:/LS1/LS1/src/main.cpp:17:
At global scope:
cc1plus.exe: warning: unrecognized command line option '-Wno-unknown-attributes'
sds++ log file saved as C:/LS1/LS1/Debug/_sds/reports/sds_main.log

'Finished building: ../src/main.cpp'
' '
'Building target: LS1.elf'
'Invoking: SDS++ Linker'
sds++ --sysroot=C:\LS1\zybo_z7_20\sw\sysroot -L=/lib -L=/usr/lib -Wl,-rpath-link=C:\LS1\zybo_z7_20\sw\sysroot/lib,-rpath-link=C:\LS1\zybo_z7_20\sw\sysroot/usr/lib -sdcard ../scripts --remote_ip_cache C:/LS1/ip_cache -o "LS1.elf" ./src/v4l2_helper/v4l2_helper.o ./src/uio/uio_ll.o ./src/hls_helper/hls_helper.o ./src/filter2d/filter2d_cv.o ./src/filter2d/filter2d_xf.o ./src/drm_helper/drm_helper.o ./src/main.o -lglib-2.0 -ldrm -lv4l2subdev -lmediactl -lopencv_imgcodecs -lopencv_core -llzma -ltiff -lpng16 -lz -ljpeg -lopencv_imgproc -ldl -lrt -lwebp -lopencv_features2d -lncurses -lopencv_flann -dmclkid 0 -sds-sys-config linux -sds-proc linux -sds-pf "C:\LS1\zybo_z7_20"
Validating feature ap_sdsoc
License available for feature ap_sdsoc
Your ap_sdsoc license expires in 18 day(s)
Analyzing object files
... C:/LS1/LS1/Debug/src/v4l2_helper/v4l2_helper.o
... C:/LS1/LS1/Debug/src/uio/uio_ll.o
... C:/LS1/LS1/Debug/src/hls_helper/hls_helper.o
... C:/LS1/LS1/Debug/src/filter2d/filter2d_cv.o
... C:/LS1/LS1/Debug/src/filter2d/filter2d_xf.o
... C:/LS1/LS1/Debug/src/drm_helper/drm_helper.o
... C:/LS1/LS1/Debug/src/main.o
Generating data motion network

C:\LS1\LS1\Debug>C:\Xilinx\SDx\2017.4\llvm-clang\win64\llvm\bin\llvm-link.exe -o C:/LS1/LS1/Debug/_sds/.llvm/sds_all.o C:/LS1/LS1/Debug/_sds/.llvm/./src/v4l2_helper/v4l2_helper.s C:/LS1/LS1/Debug/_sds/.llvm/./src/uio/uio_ll.s C:/LS1/LS1/Debug/_sds/.llvm/./src/hls_helper/hls_helper.s C:/LS1/LS1/Debug/_sds/.llvm/./src/filter2d/filter2d_cv.s C:/LS1/LS1/Debug/_sds/.llvm/./src/filter2d/filter2d_xf.s C:/LS1/LS1/Debug/_sds/.llvm/./src/drm_helper/drm_helper.s C:/LS1/LS1/Debug/_sds/.llvm/./src/main.s

C:\LS1\LS1\Debug>exit /b 0

C:\LS1\LS1\Debug\_sds\.llvm>opt -disable-output -mem2reg -basicaa -XidanePass --platform zybo_z7_20 --dmclkid 0 --repo C:/LS1/LS1/Debug/_sds/.cdb/xd_ip_db.xml --dmdb C:/Xilinx/SDx/2017.4/data/DM.db -os linux -processor cortex-a9 0<sds_all.o
INFO: [DMAnalysis 83-4494] Analyzing hardware accelerators...
WARNING: [DMAnalysis 83-4502] Function read_input_rgb @ ../src\hls_helper/hls_helper.h is not a HW accelerator but has SDS pragma applied
WARNING: [DMAnalysis 83-4502] Function read_input_gray @ ../src\hls_helper/hls_helper.h is not a HW accelerator but has SDS pragma applied
WARNING: [DMAnalysis 83-4502] Function write_output_rgb @ ../src\hls_helper/hls_helper.h is not a HW accelerator but has SDS pragma applied
INFO: [DMAnalysis 83-4497] Analyzing callers to hardware accelerators...
INFO: [DMAnalysis 83-4444] Scheduling data transfer graph for partition 0
INFO: [DMAnalysis 83-4446] Creating data motion network hardware for partition 0
INFO: [DMAnalysis 83-4448] Creating software stub functions for partition 0
INFO: [DMAnalysis 83-4450] Generating data motion network report for partition 0
INFO: [DMAnalysis 83-4454] Rewriting caller code
Creating block diagram (BD)
Creating top.bd.tcl
INFO: [SDSoC 83-2100] Your ap_sdsoc license expires in 18 day(s)
Rewrite caller functions
Compile caller rewrite file C:/LS1/LS1/Debug/_sds/swstubs/filter2d_xf.cpp
from C:/LS1/LS1/src/filter2d/filter2d_xf.h:13,
from C:/LS1/LS1/Debug/_sds/swstubs/filter2d_xf.cpp:42:
Prepare hardware access API functions
Create accelerator stub functions
Compile hardware access API functions
Compile accelerator stub functions
from C:/LS1/LS1/src/hls_helper/hls_helper.h:4,
from hls_helper.cpp:3:
from xf_custom_convolution_hpp.cpp:36:
Preliminary link application ELF
Enable generation of hardware programming files
Enable generation of boot files
Calling VPL for partition 0

****** vpl v2017.4 (64-bit)
**** SW Build 2086221 on Fri Dec 15 20:55:39 MST 2017
** Copyright 1986-2017 Xilinx, Inc. All Rights Reserved.

INFO: [VPL 60-895] Target platform: C:/LS1/zybo_z7_20\zybo_z7_20.xpfm
INFO: [VPL 60-423] Target device: zybo_z7_20
INFO: [VPL 60-251] Hardware accelerator integration...

===>The following messages were generated while creating FPGA bitstream. Log file:C:/LS1/LS1/Debug/_sds/p0/_vpl/ipi/vivado.log :
ERROR: [VPL 5-336] This command cannot be run, as the BD-design is locked. Locked reason(s):
* Block design contains locked IPs. Please run report_ip_status for more details and recommendations on how to fix this issue.
List of locked IPs:
zybo_z7_20_mipi_csi2_rx_subsystem_0_0

ERROR: [VPL 60-341] Hardware accelerator integration failed. Aborting build_system. The following log file is available for debugging 'C:/LS1/LS1/Debug/_sds/p0/_vpl/ipi/vivado.log'. Contact your local Xilinx representative and provide the log file for further assistance.
ERROR: [VPL 60-806] Failed to finish platform linker
ERROR: [SdsCompiler 83-5019] Exiting sds++ : Error when calling 'C:/Xilinx/SDx/2017.4/bin/vpl --iprepo C:/LS1/LS1/Debug/_sds/iprepo/repo --iprepo C:/Xilinx/SDx/2017.4/data/ip/xilinx --platform C:/LS1/zybo_z7_20/zybo_z7_20.xpfm --temp_dir C:/LS1/LS1/Debug/_sds/p0 --output_dir C:/LS1/LS1/Debug/_sds/p0/vpl --input_file C:/LS1/LS1/Debug/_sds/p0/.xsd/top.bd.tcl --target hw --save_temps --kernels write_output_gray:w1_xf_filter2D --webtalk_flag SDSoC --remote_ip_cache C:/LS1/ip_cache '
sds++ log file saved as C:/LS1/LS1/Debug/_sds/reports/sds.log
ERROR: [SdsCompiler 83-5004] Build failed

make: *** [LS1.elf] Error 1

01:49:58 Build Finished (took 16m:54s.289ms)

/*********************************************Log file:C:/LS1/LS1/Debug/_sds/p0/_vpl/ipi/vivado.log**************************************************/

****** Vivado v2017.4 (64-bit)
**** SW Build 2086221 on Fri Dec 15 20:55:39 MST 2017
**** IP Build 2085800 on Fri Dec 15 22:25:07 MST 2017
** Copyright 1986-2017 Xilinx, Inc. All Rights Reserved.

Sourcing tcl script 'C:/Users/samee/AppData/Roaming/Xilinx/Vivado/Vivado_init.tcl'
couldn't load library "features": this library or a dependent library could not be found in library path
while executing
"load features core"
(file "C:/Users/samee/AppData/Roaming/Xilinx/Vivado/Vivado_init.tcl" line 3)
source C:/LS1/LS1/Debug/_sds/p0/_vpl/ipi/ipirun.tcl -notrace
Creating Vivado project and starting FPGA synthesis.
--- DEBUG: source ./rebuild.tcl to create syn project
INFO: [IP_Flow 19-234] Refreshing IP repositories
WARNING: [IP_Flow 19-2248] Failed to load user IP repository 'c:/LS1/LS1/Debug/_sds/p0/_vpl/zybo_z7_20.ipdefs/repo_0'; Can't find the specified path.
If this directory should no longer be in your list of user repositories, go to the IP Settings dialog and remove it.
INFO: [IP_Flow 19-2313] Loaded Vivado IP repository 'C:/Xilinx/Vivado/2017.4/data/ip'.
WARNING: [BD 41-1661] One or more IPs have been locked in the design 'zybo_z7_20.bd'. Please run report_ip_status for more details and recommendations on how to fix this issue.
List of locked IPs:
zybo_z7_20_axi_dynclk_0_0
zybo_z7_20_axi_i2s_adi_0_0
zybo_z7_20_rgb2dvi_1_0
zybo_z7_20_pwm_rgb_0
zybo_z7_20_dvi2rgb_1_0
zybo_z7_20_mipi_csi2_rx_subsystem_0_0

WARNING: [IP_Flow 19-2162] IP 'zybo_z7_20_axi_dynclk_0_0' is locked:
* IP definition 'axi_dynclk (1.0)' for IP 'zybo_z7_20_axi_dynclk_0_0' (customized with software release 2017.4) was not found in the IP Catalog.
Please select 'Report IP Status' from the 'Tools/Report' menu or run Tcl command 'report_ip_status' for more information.
WARNING: [IP_Flow 19-2162] IP 'zybo_z7_20_axi_i2s_adi_0_0' is locked:
* IP definition 'axi_i2s_adi (1.0)' for IP 'zybo_z7_20_axi_i2s_adi_0_0' (customized with software release 2017.4) was not found in the IP Catalog.
Please select 'Report IP Status' from the 'Tools/Report' menu or run Tcl command 'report_ip_status' for more information.
WARNING: [IP_Flow 19-2162] IP 'zybo_z7_20_dvi2rgb_1_0' is locked:
* IP definition 'dvi2rgb (1.8)' for IP 'zybo_z7_20_dvi2rgb_1_0' (customized with software release 2017.4) was not found in the IP Catalog.
Please select 'Report IP Status' from the 'Tools/Report' menu or run Tcl command 'report_ip_status' for more information.
WARNING: [IP_Flow 19-2162] IP 'zybo_z7_20_pwm_rgb_0' is locked:
* IP definition 'PWM (2.0)' for IP 'zybo_z7_20_pwm_rgb_0' (customized with software release 2017.4) was not found in the IP Catalog.
Please select 'Report IP Status' from the 'Tools/Report' menu or run Tcl command 'report_ip_status' for more information.
WARNING: [IP_Flow 19-2162] IP 'zybo_z7_20_rgb2dvi_1_0' is locked:
* IP definition 'rgb2dvi (1.4)' for IP 'zybo_z7_20_rgb2dvi_1_0' (customized with software release 2017.4) was not found in the IP Catalog.
Please select 'Report IP Status' from the 'Tools/Report' menu or run Tcl command 'report_ip_status' for more information.
WARNING: [IP_Flow 19-2162] IP 'bd_894b_rx_0' is locked:
* IP 'bd_894b_rx_0' requires one or more mandatory licenses but no valid licenses were found. However license checkpoints may prevent use of this IP in some tool flows.
Please select 'Report IP Status' from the 'Tools/Report' menu or run Tcl command 'report_ip_status' for more information.
WARNING: [IP_Flow 19-2162] IP 'zybo_z7_20_mipi_csi2_rx_subsystem_0_0' is locked:
* IP 'zybo_z7_20_mipi_csi2_rx_subsystem_0_0' requires one or more mandatory licenses but no valid licenses were found. However license checkpoints may prevent use of this IP in some tool flows.
* IP 'zybo_z7_20_mipi_csi2_rx_subsystem_0_0' contains one or more locked subcores.
Please select 'Report IP Status' fWARNING: [IP_Flow 19-2162] IP 'zybo_z7_20_mipi_csi2_rx_subsystem_0_0' is locked:
* IP 'zyimport_files: Time (s): cpu = 00:00:13 ; elapsed = 00:00:46 . Memory (MB): peak = 375.891 ; gain = 90.859
INFO: Project created:syn
--- DEBUG: setting ip_repo_paths: C:/LS1/LS1/Debug/_sds/iprepo/repo C:/Xilinx/SDx/2017.4/data/ip/xilinx ./.local_dsa/iprepo C:/Xilinx/SDx/2017.4/data/cache/xilinx ./.local_dsa/ipcache C:/Xilinx/SDx/2017.4/data/ip/xilinx
--- DEBUG: update_ip_catalog
INFO: [IP_Flow 19-234] Refreshing IP repositories
INFO: [IP_Flow 19-1700] Loaded user IP repository 'c:/LS1/LS1/Debug/_sds/iprepo/repo'.
INFO: [IP_Flow 19-1700] Loaded user IP repository 'c:/Xilinx/SDx/2017.4/data/ip/xilinx'.
INFO: [IP_Flow 19-1700] Loaded user IP repository 'c:/LS1/LS1/Debug/_sds/p0/_vpl/ipi/.local_dsa/iprepo'.
INFO: [IP_Flow 19-1700] Loaded user IP repository 'c:/Xilinx/SDx/2017.4/data/cache/xilinx'.
INFO: [IP_Flow 19-1700] Loaded user IP repository 'c:/LS1/LS1/Debug/_sds/p0/_vpl/ipi/.local_dsa/ipcache'.
WARNING: [IP_Flow 19-2207] Repository 'c:/Xilinx/SDx/2017.4/data/ip/xilinx' already exists; ignoring attempt to add it again.
INFO: [IP_Flow 19-1700] Loaded user IP repository 'c:/Xilinx/SDx/2017.4/data/ip/xilinx'.
update_ip_catalog: Time (s): cpu = 00:00:04 ; elapsed = 00:00:07 . Memory (MB): peak = 563.234 ; gain = 187.344
--- DEBUG: config_ip_cache -use_cache_location C:/LS1/ip_cache
--- DEBUG: open_bd_design -auto_upgrade [get_files zybo_z7_20.bd]
Adding cell -- digilentinc.com:ip:axi_dynclk:1.0 - axi_dynclk_0
Adding cell -- xilinx.com:ip:axi_gpio:2.0 - axi_gpio_eth
Adding cell -- xilinx.com:ip:axi_gpio:2.0 - axi_gpio_led
Adding cell -- xilinx.com:ip:axi_gpio:2.0 - axi_gpio_sw_btn
Adding cell -- xilinx.com:ip:axi_gpio:2.0 - axi_gpio_video
Adding cell -- analog.com:user:axi_i2s_adi:1.0 - axi_i2s_adi_0
Adding cell -- xilinx.com:ip:axi_vdma:6.3 - axi_vdma_0
Adding cell -- xilinx.com:ip:axi_vdma:6.3 - axi_vdma_1
Adding cell -- xilinx.com:ip:axis_subset_converter:1.1 - axis_subset_converter_in
Adding cell -- xilinx.com:ip:axis_subset_converter:1.1 - axis_subset_converter_out
Adding cell -- xilinx.com:ip:clk_wiz:5.4 - clk_wiz_0
Adding cell -- digilentinc.com:ip:dvi2rgb:1.8 - dvi2rgb_1
Adding cell -- xilinx.com:ip:proc_sys_reset:5.0 - proc_sys_reset_0
Adding cell -- xilinx.com:ip:processing_system7:5.5 - processing_system7_0
Adding cell -- digilentinc.com:IP:PWM:2.0 - pwm_rgb
Adding cell -- digilentinc.com:ip:rgb2dvi:1.4 - rgb2dvi_1
Adding cell -- xilinx.com:ip:proc_sys_reset:5.0 - psr_fclk0
Adding cell -- xilinx.com:ip:proc_sys_reset:5.0 - psr_fclk1
Adding cell -- xilinx.com:ip:v_axi4s_vid_out:4.0 - v_axi4s_vid_out_0
Adding cell -- xilinx.com:ip:v_tc:6.1 - v_tc_in
Adding cell -- xilinx.com:ip:v_tc:6.1 - v_tc_out
Adding cell -- xilinx.com:ip:v_vid_in_axi4s:4.0 - v_vid_in_axi4s_0
Adding cell -- xilinx.com:ip:xadc_wiz:3.3 - xadc_wiz_0
Adding cell -- xilinx.com:ip:xlconcat:2.1 - xlconcat_0
Adding cell -- xilinx.com:ip:xlconstant:1.1 - xlconstant_0
Adding cell -- xilinx.com:ip:xlconstant:1.1 - xlconstant_1
Adding cell -- xilinx.com:ip:proc_sys_reset:5.0 - psr_clkwiz2
Adding cell -- xilinx.com:ip:proc_sys_reset:5.0 - psr_clkwiz5
Adding cell -- xilinx.com:ip:proc_sys_reset:5.0 - psr_clkwiz4
Adding cell -- xilinx.com:ip:proc_sys_reset:5.0 - psr_clkwiz3
Adding cell -- xilinx.com:ip:util_ds_buf:2.1 - util_bufg_fclk1
Adding cell -- xilinx.com:ip:mipi_csi2_rx_subsystem:3.0 - mipi_csi2_rx_subsystem_0
Adding cell -- xilinx.com:ip:axis_subset_converter:1.1 - axis_subset_converter_0
Adding cell -- xilinx.com:ip:v_frmbuf_wr:2.0 - v_frmbuf_wr_0
Adding cell -- xilinx.com:ip:axi_iic:2.0 - axi_iic_0
Adding cell -- xilinx.com:ip:axi_data_fifo:2.1 - axi_data_fifo_0
Adding cell -- xilinx.com:ip:xlslice:1.0 - PS_GPIO_0
Adding cell -- xilinx.com:ip:xlslice:1.0 - PS_GPIO_2
Adding cell -- xilinx.com:ip:xlslice:1.0 - PS_GPIO_3
Adding cell -- xilinx.com:ip:axis_data_fifo:1.1 - axis_data_fifo_0
WARNING: [BD 41-1731] Type mismatch between connected pins: /axi_dynclk_0/LOCKED_O(undef) and /rgb2dvi_1/aRst_n(rst)
WARNING: [BD 41-1731] Type mismatch between connected pins: /clk_wiz_0/clk_out1(clk) and /axi_i2s_adi_0/DATA_CLK_I(undef)
WARNING: [BD 41-1731] Type mismatch between connected pins: /dvi2rgb_1/aPixelClkLckd(undef) and /proc_sys_reset_0/aux_reset_in(rst)
Adding cell -- xilinx.com:ip:axi_protocol_converter:2.1 - auto_pc
Adding cell -- xilinx.com:ip:axi_crossbar:2.1 - xbar
Adding cell -- xilinx.com:ip:axi_protocol_converter:2.1 - auto_pc
Adding cell -- xilinx.com:ip:axi_crossbar:2.1 - xbar
Adding cell -- xilinx.com:ip:axi_register_slice:2.1 - m00_regslice
Adding cell -- xilinx.com:ip:axi_protocol_converter:2.1 - auto_pc
Adding cell -- xilinx.com:ip:axi_register_slice:2.1 - s01_regslice
Adding cell -- xilinx.com:ip:axi_register_slice:2.1 - s00_regslice
Successfully read diagram <zybo_z7_20> from BD file <C:/LS1/LS1/Debug/_sds/p0/_vpl/ipi/syn/syn.srcs/sources_1/bd/zybo_z7_20/zybo_z7_20.bd>
--- DEBUG: source ./top.bd.tcl
WARNING: [Coretcl 2-1042] No IP was identified for upgrade.
CRITICAL WARNING: [BD 41-737] Cannot set the parameter C_S_AXIS_S2MM_TDATA_WIDTH on /dm_1. It is read-only.
create_bd_cell: Time (s): cpu = 00:01:11 ; elapsed = 00:01:13 . Memory (MB): peak = 771.078 ; gain = 205.047
WARNING: [IP_Flow 19-4684] Expected long value for param S_AXIS_BRAM_0_ADDR_WIDTH but, float/scientific notation value 2.0 is provided. The value is converted to long type(2)
WARNING: [IP_Flow 19-4684] Expected long value for param S_AXIS_BRAM_0_ADDR_WIDTH but, float/scientific notation value 5.0 is provided. The value is converted to long type(5)
create_bd_cell: Time (s): cpu = 00:01:55 ; elapsed = 00:01:56 . Memory (MB): peak = 917.262 ; gain = 126.793
WARNING: [BD 41-1753] The name 'axi_ic_processing_system7_0_M_AXI_GP1' you have specified is long. The Windows OS has path length limitations. It is recommended you use shorter names(less than 25 characters) to reduce the likelihood of issues when/if running on windows OS.
WARNING: [BD 41-1753] The name 'axi_ic_processing_system7_0_S_AXI_HP2' you have specified is long. The Windows OS has path length limitations. It is recommended you use shorter names(less than 25 characters) to reduce the likelihood of issues when/if running on windows OS.
WARNING: [BD 41-1753] The name 'axi_ic_processing_system7_0_S_AXI_HP3' you have specified is long. The Windows OS has path length limitations. It is recommended you use shorter names(less than 25 characters) to reduce the likelihood of issues when/if running on windows OS.
WARNING: [BD 5-235] No pins matched 'get_bd_pins /dm_0/mm2s_prmry_resetn_out_n'
WARNING: [BD 5-235] No pins matched 'get_bd_pins /dm_1/s2mm_prmry_resetn_out_n'
--- DEBUG: save_bd_design
Wrote : <C:/LS1/LS1/Debug/_sds/p0/_vpl/ipi/syn/syn.srcs/sources_1/bd/zybo_z7_20/zybo_z7_20.bd>
save_bd_design: Time (s): cpu = 00:00:13 ; elapsed = 00:00:18 . Memory (MB): peak = 1267.711 ; gain = 227.715
--- DEBUG: inserting profiling cores
--- DEBUG: inserting SystemILA debug cores
--- DEBUG: insert_chipscope_debug: No chipscope_debugs dict name - nothing to insert
--- DEBUG: assign_bd_address
</processing_system7_0/S_AXI_HP2/HP2_DDR_LOWOCM> is being mapped into </dm_0/Data_MM2S> at <0x00000000 [ 1G ]>
</processing_system7_0/S_AXI_HP2/HP2_DDR_LOWOCM> is being mapped into </dm_0/Data_SG> at <0x00000000 [ 1G ]>
</processing_system7_0/S_AXI_HP3/HP3_DDR_LOWOCM> is being mapped into </dm_1/Data_S2MM> at <0x00000000 [ 1G ]>
</processing_system7_0/S_AXI_HP3/HP3_DDR_LOWOCM> is being mapped into </dm_1/Data_SG> at <0x00000000 [ 1G ]>
</dm_0/S_AXI_LITE/Reg> is being mapped into </processing_system7_0/Data> at <0x80400000 [ 64K ]>
</dm_1/S_AXI_LITE/Reg> is being mapped into </processing_system7_0/Data> at <0x80410000 [ 64K ]>
</dm_2/S_AXI/Mem0> is being mapped into </processing_system7_0/Data> at <0x83C00000 [ 64K ]>
</w1_xf_filter2D_1_if/S_AXI/reg0> is being mapped into </processing_system7_0/Data> at <0x83C10000 [ 64K ]>
</write_output_gray_1_if/S_AXI/reg0> is being mapped into </processing_system7_0/Data> at <0x83C20000 [ 64K ]>
--- DEBUG: validate_bd_design -force
ERROR: [BD 5-336] This command cannot be run, as the BD-design is locked. Locked reason(s):
* Block design contains locked IPs. Please run report_ip_status for more details and recommendations on how to fix this issue.
List of locked IPs:
zybo_z7_20_mipi_csi2_rx_subsystem_0_0

ERROR: [Common 17-39] 'validate_bd_design' failed due to earlier errors.

while executing
"validate_bd_design -force"
(procedure "ocl_util::init_ocl_project_unip" line 202)
invoked from within
"ocl_util::init_ocl_project_unip $dsa_info $config_info $clk_info $debug_profilERROR: [Common 17-39] 'validate_bd_design' failed due to earlier errors.

INFO: [Common 17-206] Exiting Vivado at Fri Mar 15 01:49:54 2019...
::init_ocl_project_unip" line 202)
invoked from within
"ocl_util::init_ocl_project_unip $dsa_info $config_info $clk_info $debug_profile_info"
(file "C:/LS1/LS1/Debug/_sds/p0/_vpl/ipi/ipirun.tcl" line 172)
INFO: [Common 17-206] Exiting Vivado at Fri Mar 15 01:49:54 2019...

/***********************************************C:/LS1/LS1/Debug/_sds/reports/sds.log************************************************/

(c) Copyright 2012-2017 Xilinx, Inc. All Rights Reserved.
#-----------------------------------------------------------
# Tool version : sds++ 2017.4 SW Build 2086221 on Fri Dec 15 20:56:18 MST 2017
# Start time : Fri Mar 15 01:40:45 -0400 2019
# Command line : sds++ {--sysroot=C:\LS1\zybo_z7_20\sw\sysroot} -L=/lib -L=/usr/lib {-Wl,-rpath-link=C:\LS1\zybo_z7_20\sw\sysroot/lib,-rpath-link=C:\LS1\zybo_z7_20\sw\sysroot/usr/lib} -sdcard ../scripts --remote_ip_cache C:/LS1/ip_cache -o LS1.elf ./src/v4l2_helper/v4l2_helper.o ./src/uio/uio_ll.o ./src/hls_helper/hls_helper.o ./src/filter2d/filter2d_cv.o ./src/filter2d/filter2d_xf.o ./src/drm_helper/drm_helper.o ./src/main.o -lglib-2.0 -ldrm -lv4l2subdev -lmediactl -lopencv_imgcodecs -lopencv_core -llzma -ltiff -lpng16 -lz -ljpeg -lopencv_imgproc -ldl -lrt -lwebp -lopencv_features2d -lncurses -lopencv_flann -dmclkid 0 -sds-sys-config linux -sds-proc linux -sds-pf {C:\LS1\zybo_z7_20}
# Log file : C:/LS1/LS1/Debug/_sds/reports/sds.log
# Journal file : C:/LS1/LS1/Debug/_sds/reports/sds.jou
# Report file : C:/LS1/LS1/Debug/_sds/reports/sds.rpt
#-----------------------------------------------------------

Libraries: glib-2.0 drm v4l2subdev mediactl opencv_imgcodecs opencv_core lzma tiff png16 z jpeg opencv_imgproc dl rt webp opencv_features2d ncurses opencv_flann
Library Paths =/lib =/usr/lib {}
Searching for static library libglib-2.0.a
Searching for static library libdrm.a
Searching for static library libv4l2subdev.a
Searching for static library libmediactl.a
Searching for static library libopencv_imgcodecs.a
Searching for static library libopencv_core.a
Searching for static library liblzma.a
Searching for static library libtiff.a
Searching for static library libpng16.a
Searching for static library libz.a
Searching for static library libjpeg.a
Searching for static library libopencv_imgproc.a
Searching for static library libdl.a
Searching for static library librt.a
Searching for static library libwebp.a
Searching for static library libopencv_features2d.a
Searching for static library libncurses.a
Searching for static library libopencv_flann.a
Analyzing object files
arm-linux-gnueabihf-objcopy -O binary --set-section-flags .xdinfo=alloc --only-section=.xdinfo C:/LS1/LS1/Debug/src/v4l2_helper/v4l2_helper.o C:/LS1/LS1/Debug/_sds/.data/xdinfo.xml
arm-linux-gnueabihf-objcopy -O binary --set-section-flags .xddata=alloc --only-section=.xddata C:/LS1/LS1/Debug/src/v4l2_helper/v4l2_helper.o C:/LS1/LS1/Debug/_sds/.data/xddata.xml
arm-linux-gnueabihf-objcopy -O binary --set-section-flags .xdinfo=alloc --only-section=.xdinfo C:/LS1/LS1/Debug/src/uio/uio_ll.o C:/LS1/LS1/Debug/_sds/.data/xdinfo.xml
arm-linux-gnueabihf-objcopy -O binary --set-section-flags .xddata=alloc --only-section=.xddata C:/LS1/LS1/Debug/src/uio/uio_ll.o C:/LS1/LS1/Debug/_sds/.data/xddata.xml
arm-linux-gnueabihf-objcopy -O binary --set-section-flags .xdinfo=alloc --only-section=.xdinfo C:/LS1/LS1/Debug/src/hls_helper/hls_helper.o C:/LS1/LS1/Debug/_sds/.data/xdinfo.xml
arm-linux-gnueabihf-objcopy -O binary --set-section-flags .xddata=alloc --only-section=.xddata C:/LS1/LS1/Debug/src/hls_helper/hls_helper.o C:/LS1/LS1/Debug/_sds/.data/write_output_gray.xml
arm-linux-gnueabihf-objcopy -O binary --set-section-flags .xdpp=alloc --only-section=.xdpp C:/LS1/LS1/Debug/src/hls_helper/hls_helper.o C:/LS1/LS1/Debug/_sds/.pp/hls_helper.ii
arm-linux-gnueabihf-objcopy -O binary --set-section-flags .xdfcnmap=alloc --only-section=.xdfcnmap C:/LS1/LS1/Debug/src/hls_helper/hls_helper.o C:/LS1/LS1/Debug/_sds/.cdb/write_output_gray.write_output_gray.fcnmap.xml
arm-linux-gnueabihf-objcopy -O binary --set-section-flags .xdhlscore=alloc --only-section=.xdhlscore C:/LS1/LS1/Debug/src/hls_helper/hls_helper.o C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_write_output_gray_1_0/xilinx_com_hls_write_output_gray_1_0.zip
C:/Xilinx/SDx/2017.4/bin/unzip.bat -u -o C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_write_output_gray_1_0/xilinx_com_hls_write_output_gray_1_0.zip -d C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_write_output_gray_1_0
Archive: C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_write_output_gray_1_0/xilinx_com_hls_write_output_gray_1_0.zip
inflating: C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_write_output_gray_1_0/component.xml
inflating: C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_write_output_gray_1_0/constraints/a0_write_output_gray_ooc.xdc
inflating: C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_write_output_gray_1_0/hdl/verilog/a0_write_output_gray.v
inflating: C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_write_output_gray_1_0/hdl/vhdl/a0_write_output_gray.vhd
inflating: C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_write_output_gray_1_0/doc/ReleaseNotes.txt
inflating: C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_write_output_gray_1_0/misc/logo.png
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arm-linux-gnueabihf-objcopy -O binary --set-section-flags .xdif=alloc --only-section=.xdif C:/LS1/LS1/Debug/src/hls_helper/hls_helper.o C:/LS1/LS1/Debug/_sds/.cdb/write_output_gray_if.xml
arm-linux-gnueabihf-objcopy -O binary --set-section-flags .xdinfo=alloc --only-section=.xdinfo C:/LS1/LS1/Debug/src/filter2d/filter2d_cv.o C:/LS1/LS1/Debug/_sds/.data/xdinfo.xml
arm-linux-gnueabihf-objcopy -O binary --set-section-flags .xddata=alloc --only-section=.xddata C:/LS1/LS1/Debug/src/filter2d/filter2d_cv.o C:/LS1/LS1/Debug/_sds/.data/xddata.xml
arm-linux-gnueabihf-objcopy -O binary --set-section-flags .xdinfo=alloc --only-section=.xdinfo C:/LS1/LS1/Debug/src/filter2d/filter2d_xf.o C:/LS1/LS1/Debug/_sds/.data/xdinfo.xml
arm-linux-gnueabihf-objcopy -O binary --set-section-flags .xddata=alloc --only-section=.xddata C:/LS1/LS1/Debug/src/filter2d/filter2d_xf.o C:/LS1/LS1/Debug/_sds/.data/w1_xf_filter2D.xml
arm-linux-gnueabihf-objcopy -O binary --set-section-flags .xdpp=alloc --only-section=.xdpp C:/LS1/LS1/Debug/src/filter2d/filter2d_xf.o C:/LS1/LS1/Debug/_sds/.pp/filter2d_xf.ii
arm-linux-gnueabihf-objcopy -O binary --set-section-flags .xdfcnmap=alloc --only-section=.xdfcnmap C:/LS1/LS1/Debug/src/filter2d/filter2d_xf.o C:/LS1/LS1/Debug/_sds/.cdb/w1_xf_filter2D.w1_xf_filter2D.fcnmap.xml
arm-linux-gnueabihf-objcopy -O binary --set-section-flags .xdhlscore=alloc --only-section=.xdhlscore C:/LS1/LS1/Debug/src/filter2d/filter2d_xf.o C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_w1_xf_filter2D_1_0/xilinx_com_hls_w1_xf_filter2D_1_0.zip
C:/Xilinx/SDx/2017.4/bin/unzip.bat -u -o C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_w1_xf_filter2D_1_0/xilinx_com_hls_w1_xf_filter2D_1_0.zip -d C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_w1_xf_filter2D_1_0
Archive: C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_w1_xf_filter2D_1_0/xilinx_com_hls_w1_xf_filter2D_1_0.zip
inflating: C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_w1_xf_filter2D_1_0/component.xml
inflating: C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_w1_xf_filter2D_1_0/constraints/a1_w1_xf_filter2D_ooc.xdc
inflating: C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_w1_xf_filter2D_1_0/hdl/verilog/a1_fifo_w16_d2_A.v
inflating: C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_w1_xf_filter2D_1_0/hdl/verilog/a1_fifo_w32_d1_A.v
inflating: C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_w1_xf_filter2D_1_0/hdl/verilog/a1_fifo_w32_d3_A.v
inflating: C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_w1_xf_filter2D_1_0/hdl/verilog/a1_fifo_w8_d1_A.v
inflating: C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_w1_xf_filter2D_1_0/hdl/verilog/a1_fifo_w8_d2_A.v
inflating: C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_w1_xf_filter2D_1_0/hdl/verilog/a1_filter2D.v
inflating: C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_w1_xf_filter2D_1_0/hdl/verilog/a1_filter2D_entry3.v
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inflating: C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_w1_xf_filter2D_1_0/hdl/verilog/a1_filter2D_Loop_2_proc.v
inflating: C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_w1_xf_filter2D_1_0/hdl/verilog/a1_filter2D_Loop_3_proc.v
inflating: C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_w1_xf_filter2D_1_0/hdl/verilog/a1_start_for_filter2kbM.v
inflating: C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_w1_xf_filter2D_1_0/hdl/verilog/a1_start_for_filter2lbW.v
inflating: C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_w1_xf_filter2D_1_0/hdl/verilog/a1_w1_xf_filter2D.v
inflating: C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_w1_xf_filter2D_1_0/hdl/verilog/a1_w1_xf_filter2D_macud.v
inflating: C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_w1_xf_filter2D_1_0/hdl/verilog/a1_w1_xf_filter2D_madEe.v
inflating: C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_w1_xf_filter2D_1_0/hdl/verilog/a1_w1_xf_filter2D_maeOg.v
inflating: C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_w1_xf_filter2D_1_0/hdl/verilog/a1_w1_xf_filter2D_mafYi.v
inflating: C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_w1_xf_filter2D_1_0/hdl/verilog/a1_w1_xf_filter2D_mubkb.v
inflating: C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_w1_xf_filter2D_1_0/hdl/verilog/a1_w1_xf_filter2D_mujbC.v
inflating: C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_w1_xf_filter2D_1_0/hdl/verilog/a1_xFApplyFilter2D.v
inflating: C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_w1_xf_filter2D_1_0/hdl/verilog/a1_xFCustomConvolution.v
inflating: C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_w1_xf_filter2D_1_0/hdl/verilog/a1_xFFilter2Dkernel.v
inflating: C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_w1_xf_filter2D_1_0/hdl/verilog/a1_xFFilter2Dkernel_g8j.v
inflating: C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_w1_xf_filter2D_1_0/hdl/vhdl/a1_fifo_w16_d2_A.vhd
inflating: C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_w1_xf_filter2D_1_0/hdl/vhdl/a1_fifo_w32_d1_A.vhd
inflating: C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_w1_xf_filter2D_1_0/hdl/vhdl/a1_fifo_w32_d3_A.vhd
inflating: C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_w1_xf_filter2D_1_0/hdl/vhdl/a1_fifo_w8_d1_A.vhd
inflating: C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_w1_xf_filter2D_1_0/hdl/vhdl/a1_fifo_w8_d2_A.vhd
inflating: C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_w1_xf_filter2D_1_0/hdl/vhdl/a1_filter2D.vhd
inflating: C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_w1_xf_filter2D_1_0/hdl/vhdl/a1_filter2D_entry3.vhd
inflating: C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_w1_xf_filter2D_1_0/hdl/vhdl/a1_filter2D_entry50.vhd
inflating: C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_w1_xf_filter2D_1_0/hdl/vhdl/a1_filter2D_Loop_1_proc.vhd
inflating: C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_w1_xf_filter2D_1_0/hdl/vhdl/a1_filter2D_Loop_2_proc.vhd
inflating: C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_w1_xf_filter2D_1_0/hdl/vhdl/a1_filter2D_Loop_3_proc.vhd
inflating: C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_w1_xf_filter2D_1_0/hdl/vhdl/a1_start_for_filter2kbM.vhd
inflating: C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_w1_xf_filter2D_1_0/hdl/vhdl/a1_start_for_filter2lbW.vhd
inflating: C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_w1_xf_filter2D_1_0/hdl/vhdl/a1_w1_xf_filter2D.vhd
inflating: C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_w1_xf_filter2D_1_0/hdl/vhdl/a1_w1_xf_filter2D_macud.vhd
inflating: C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_w1_xf_filter2D_1_0/hdl/vhdl/a1_w1_xf_filter2D_madEe.vhd
inflating: C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_w1_xf_filter2D_1_0/hdl/vhdl/a1_w1_xf_filter2D_maeOg.vhd
inflating: C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_w1_xf_filter2D_1_0/hdl/vhdl/a1_w1_xf_filter2D_mafYi.vhd
inflating: C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_w1_xf_filter2D_1_0/hdl/vhdl/a1_w1_xf_filter2D_mubkb.vhd
inflating: C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_w1_xf_filter2D_1_0/hdl/vhdl/a1_w1_xf_filter2D_mujbC.vhd
inflating: C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_w1_xf_filter2D_1_0/hdl/vhdl/a1_xFApplyFilter2D.vhd
inflating: C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_w1_xf_filter2D_1_0/hdl/vhdl/a1_xFCustomConvolution.vhd
inflating: C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_w1_xf_filter2D_1_0/hdl/vhdl/a1_xFFilter2Dkernel.vhd
inflating: C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_w1_xf_filter2D_1_0/hdl/vhdl/a1_xFFilter2Dkernel_g8j.vhd
inflating: C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_w1_xf_filter2D_1_0/doc/ReleaseNotes.txt
inflating: C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_w1_xf_filter2D_1_0/misc/logo.png
inflating: C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_w1_xf_filter2D_1_0/xgui/w1_xf_filter2D_v1_0.tcl
arm-linux-gnueabihf-objcopy -O binary --set-section-flags .xdif=alloc --only-section=.xdif C:/LS1/LS1/Debug/src/filter2d/filter2d_xf.o C:/LS1/LS1/Debug/_sds/.cdb/w1_xf_filter2D_if.xml
arm-linux-gnueabihf-objcopy -O binary --set-section-flags .xdinfo=alloc --only-section=.xdinfo C:/LS1/LS1/Debug/src/drm_helper/drm_helper.o C:/LS1/LS1/Debug/_sds/.data/xdinfo.xml
arm-linux-gnueabihf-objcopy -O binary --set-section-flags .xddata=alloc --only-section=.xddata C:/LS1/LS1/Debug/src/drm_helper/drm_helper.o C:/LS1/LS1/Debug/_sds/.data/xddata.xml
arm-linux-gnueabihf-objcopy -O binary --set-section-flags .xdinfo=alloc --only-section=.xdinfo C:/LS1/LS1/Debug/src/main.o C:/LS1/LS1/Debug/_sds/.data/xdinfo.xml
arm-linux-gnueabihf-objcopy -O binary --set-section-flags .xddata=alloc --only-section=.xddata C:/LS1/LS1/Debug/src/main.o C:/LS1/LS1/Debug/_sds/.data/xddata.xml
C:/Xilinx/SDx/2017.4/bin/build_xd_ip_db -sds-pf C:/LS1/LS1/Debug/.Xil/zybo_z7_20.hpfm -ip C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_w1_xf_filter2D_1_0 -ip C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_write_output_gray_1_0 -o C:/LS1/LS1/Debug/_sds/.cdb/xd_ip_db.xml
INFO: Using user-defined path for XILINX_XD environment variable C:/Xilinx/SDx/2017.4
processing accelerators: C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_w1_xf_filter2D_1_0
ip_dir: C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_w1_xf_filter2D_1_0
C:/Xilinx/SDx/2017.4/bin/xsltproc --stringparam xpath "spirit:component/spirit:name/text()" C:/Xilinx/SDx/2017.4/scripts/xdcc/xpathValueOf.xsl C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_w1_xf_filter2D_1_0/component.xml
ip_name: w1_xf_filter2D
processing accelerators: C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_write_output_gray_1_0
ip_dir: C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_write_output_gray_1_0
C:/Xilinx/SDx/2017.4/bin/xsltproc --stringparam xpath "spirit:component/spirit:name/text()" C:/Xilinx/SDx/2017.4/scripts/xdcc/xpathValueOf.xsl C:/LS1/LS1/Debug/_sds/iprepo/repo/xilinx_com_hls_write_output_gray_1_0/component.xml
ip_name: write_output_gray
Generating data motion network
C:/Xilinx/SDx/2017.4/bin/llvm-link -o C:/LS1/LS1/Debug/_sds/.llvm/sds_all.o C:/LS1/LS1/Debug/_sds/.llvm/./src/v4l2_helper/v4l2_helper.s C:/LS1/LS1/Debug/_sds/.llvm/./src/uio/uio_ll.s C:/LS1/LS1/Debug/_sds/.llvm/./src/hls_helper/hls_helper.s C:/LS1/LS1/Debug/_sds/.llvm/./src/filter2d/filter2d_cv.s C:/LS1/LS1/Debug/_sds/.llvm/./src/filter2d/filter2d_xf.s C:/LS1/LS1/Debug/_sds/.llvm/./src/drm_helper/drm_helper.s C:/LS1/LS1/Debug/_sds/.llvm/./src/main.s

C:\LS1\LS1\Debug>C:\Xilinx\SDx\2017.4\llvm-clang\win64\llvm\bin\llvm-link.exe -o C:/LS1/LS1/Debug/_sds/.llvm/sds_all.o C:/LS1/LS1/Debug/_sds/.llvm/./src/v4l2_helper/v4l2_helper.s C:/LS1/LS1/Debug/_sds/.llvm/./src/uio/uio_ll.s C:/LS1/LS1/Debug/_sds/.llvm/./src/hls_helper/hls_helper.s C:/LS1/LS1/Debug/_sds/.llvm/./src/filter2d/filter2d_cv.s C:/LS1/LS1/Debug/_sds/.llvm/./src/filter2d/filter2d_xf.s C:/LS1/LS1/Debug/_sds/.llvm/./src/drm_helper/drm_helper.s C:/LS1/LS1/Debug/_sds/.llvm/./src/main.s

C:\LS1\LS1\Debug>exit /b 0
C:/Xilinx/SDx/2017.4/bin/XidanePass --platform zybo_z7_20 --dmclkid 0 --repo C:/LS1/LS1/Debug/_sds/.cdb/xd_ip_db.xml --dmdb C:/Xilinx/SDx/2017.4/data/DM.db -os linux -processor cortex-a9

C:\LS1\LS1\Debug\_sds\.llvm>opt -disable-output -mem2reg -basicaa -XidanePass --platform zybo_z7_20 --dmclkid 0 --repo C:/LS1/LS1/Debug/_sds/.cdb/xd_ip_db.xml --dmdb C:/Xilinx/SDx/2017.4/data/DM.db -os linux -processor cortex-a9 0<sds_all.o
INFO: [DMAnalysis 83-4494] Analyzing hardware accelerators...
WARNING: [DMAnalysis 83-4502] Function read_input_rgb @ ../src\hls_helper/hls_helper.h is not a HW accelerator but has SDS pragma applied
WARNING: [DMAnalysis 83-4502] Function read_input_gray @ ../src\hls_helper/hls_helper.h is not a HW accelerator but has SDS pragma applied
WARNING: [DMAnalysis 83-4502] Function write_output_rgb @ ../src\hls_helper/hls_helper.h is not a HW accelerator but has SDS pragma applied
INFO: [DMAnalysis 83-4497] Analyzing callers to hardware accelerators...
INFO: [DMAnalysis 83-4444] Scheduling data transfer graph for partition 0
INFO: [DMAnalysis 83-4446] Creating data motion network hardware for partition 0
INFO: [DMAnalysis 83-4448] Creating software stub functions for partition 0
INFO: [DMAnalysis 83-4450] Generating data motion network report for partition 0
INFO: [DMAnalysis 83-4454] Rewriting caller code
Creating block diagram (BD)
C:/Xilinx/SDx/2017.4/bin/sdx_link -cf-system C:/LS1/LS1/Debug/_sds/.llvm/apsys_0.xml -cf-db C:/LS1/LS1/Debug/_sds/.cdb/xd_ip_db.xml -xpfm C:/LS1/zybo_z7_20/zybo_z7_20.xpfm -multi-clks -trace-buffer 1024 -quiet
Creating top.bd.tcl
INFO: [SDSoC 83-2100] Your ap_sdsoc license expires in 18 day(s)
C:/Xilinx/SDx/2017.4/bin/cf2sw -i C:/LS1/LS1/Debug/_sds/.llvm/apsys_0.xml -r C:/LS1/LS1/Debug/_sds/.cdb/xd_ip_db.xml -pollMode 0 -mc
INFO: [CF2SW 83-2203] Adding accelerator adapters...
INFO: [CF2SW 83-2200] Adding axi_interconnects...
INFO: [CF2SW 83-2201] Adding axi_stream_router for scatter-gather DMAs...
INFO: [CF2SW 83-2202] Adding axi_dwidth_converters...
INFO: [CF2SW 83-2208] Adding bus connections for logical connections...
INFO: [CF2SW 83-2205] Adding clock connections...
INFO: [CF2SW 83-2206] Adding reset connections...
Rewrite caller functions
arm-linux-gnueabihf-objcopy -O binary --set-section-flags .xdinfo=alloc --only-section=.xdinfo C:/LS1/LS1/Debug/src/filter2d/filter2d_xf.o C:/LS1/LS1/Debug/_sds/.data/xdinfo.xml
C:/Xilinx/SDx/2017.4/bin/caller_rewrite -rewrite C:/LS1/LS1/Debug/_sds/.llvm/caller0.cfrewrite -o C:/LS1/LS1/Debug/_sds/swstubs/filter2d_xf.cpp C:/LS1/LS1/Debug/_sds/swstubs/unix_filter2d_xf.cpp -- -c -IC:/LS1/LS1/src/filter2d -IC:/LS1/LS1/src -IC:/LS1/zybo_z7_20/sw/linux/linux/inc/include -IC:/LS1/zybo_z7_20/sw/sysroot/usr/include/c++/6.2.1 -IC:/LS1/zybo_z7_20/sw/sysroot/usr/include/c++/6.2.1/arm-xilinx-linux-gnueabi -IC:/LS1/zybo_z7_20/sw/sysroot/usr/include/c++/6.2.1/backward -IC:/LS1/zybo_z7_20/sw/sysroot/usr/include -IC:/LS1/zybo_z7_20/sw/sysroot/usr/include/glib-2.0 -IC:/LS1/zybo_z7_20/sw/sysroot/usr/lib/glib-2.0/include -DHLS_NO_XIL_FPO_LIB -D__ARM_PCS_VFP -Wall -O0 -g -fmessage-length=0 -Wno-overloaded-virtual -Wno-unused-label -Wno-strict-overflow -Wno-uninitialized -Wno-unused-function -Wno-unused-variable -Wno-unknown-attributes -Wno-unused-local-typedefs -Wno-sign-compare -MMD -MP -D __SDSCC__ -target arm-linux-gnueabihf -mcpu=cortex-a9 -mfpu=vfpv3 -mfloat-abi=hard -O0 -g -w -I C:/LS1/zybo_z7_20/sw/linux/linux/inc/include -I C:/Xilinx/SDx/2017.4/target/aarch32-linux/include -D HLS_NO_XIL_FPO_LIB -I C:/Xilinx/Vivado/2017.4/include -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include/c++/6.2.1 -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include/c++/6.2.1/arm-linux-gnueabihf -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include/c++/6.2.1/backward -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/lib/gcc/arm-linux-gnueabihf/6.2.1/include -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/lib/gcc/arm-linux-gnueabihf/6.2.1/include-fixed -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/libc/usr/include -std=c++11
Compile caller rewrite file C:/LS1/LS1/Debug/_sds/swstubs/filter2d_xf.cpp
arm-linux-gnueabihf-g++ -c C:/LS1/LS1/Debug/_sds/swstubs/filter2d_xf.cpp -IC:/LS1/LS1/src/filter2d -IC:/LS1/LS1/src -IC:/LS1/zybo_z7_20/sw/linux/linux/inc/include -IC:/LS1/zybo_z7_20/sw/sysroot/usr/include/c++/6.2.1 -IC:/LS1/zybo_z7_20/sw/sysroot/usr/include/c++/6.2.1/arm-xilinx-linux-gnueabi -IC:/LS1/zybo_z7_20/sw/sysroot/usr/include/c++/6.2.1/backward -IC:/LS1/zybo_z7_20/sw/sysroot/usr/include -IC:/LS1/zybo_z7_20/sw/sysroot/usr/include/glib-2.0 -IC:/LS1/zybo_z7_20/sw/sysroot/usr/lib/glib-2.0/include -DHLS_NO_XIL_FPO_LIB -D__ARM_PCS_VFP -Wall -O0 -g -fmessage-length=0 -Wno-overloaded-virtual -Wno-unused-label -Wno-strict-overflow -Wno-uninitialized -Wno-unused-function -Wno-unused-variable -Wno-unknown-attributes -Wno-unused-local-typedefs -Wno-sign-compare -MMD -MP -D __SDSCC__ -I C:/LS1/zybo_z7_20/sw/linux/linux/inc/include -I C:/Xilinx/SDx/2017.4/target/aarch32-linux/include -D HLS_NO_XIL_FPO_LIB -I C:/Xilinx/Vivado/2017.4/include -o C:/LS1/LS1/Debug/_sds/swstubs/filter2d_xf.o
from C:/LS1/LS1/src/filter2d/filter2d_xf.h:13,
from C:/LS1/LS1/Debug/_sds/swstubs/filter2d_xf.cpp:42:
Prepare hardware access API functions
Create accelerator stub functions
C:/Xilinx/SDx/2017.4/bin/stub_gen -func "write_output_gray" -stub C:/LS1/LS1/Debug/_sds/.llvm/write_output_gray.cfrewrite -o C:/LS1/LS1/Debug/_sds/swstubs/hls_helper.cpp C:/LS1/LS1/Debug/_sds/swstubs/unix_hls_helper.cpp -- -c -IC:/LS1/LS1/src/hls_helper -IC:/LS1/LS1/src -IC:/LS1/zybo_z7_20/sw/linux/linux/inc/include -IC:/LS1/zybo_z7_20/sw/sysroot/usr/include/c++/6.2.1 -IC:/LS1/zybo_z7_20/sw/sysroot/usr/include/c++/6.2.1/arm-xilinx-linux-gnueabi -IC:/LS1/zybo_z7_20/sw/sysroot/usr/include/c++/6.2.1/backward -IC:/LS1/zybo_z7_20/sw/sysroot/usr/include -IC:/LS1/zybo_z7_20/sw/sysroot/usr/include/glib-2.0 -IC:/LS1/zybo_z7_20/sw/sysroot/usr/lib/glib-2.0/include -DHLS_NO_XIL_FPO_LIB -D__ARM_PCS_VFP -Wall -O0 -g -fmessage-length=0 -Wno-overloaded-virtual -Wno-unused-label -Wno-strict-overflow -Wno-uninitialized -Wno-unused-function -Wno-unused-variable -Wno-unknown-attributes -Wno-unused-local-typedefs -Wno-sign-compare -MMD -MP -D __SDSCC__ -target arm-linux-gnueabihf -mcpu=cortex-a9 -mfpu=vfpv3 -mfloat-abi=hard -O0 -g -w -I C:/LS1/zybo_z7_20/sw/linux/linux/inc/include -I C:/Xilinx/SDx/2017.4/target/aarch32-linux/include -D HLS_NO_XIL_FPO_LIB -I C:/Xilinx/Vivado/2017.4/include -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include/c++/6.2.1 -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include/c++/6.2.1/arm-linux-gnueabihf -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include/c++/6.2.1/backward -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/lib/gcc/arm-linux-gnueabihf/6.2.1/include -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/lib/gcc/arm-linux-gnueabihf/6.2.1/include-fixed -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/libc/usr/include -std=c++11
C:/Xilinx/SDx/2017.4/bin/stub_gen -func xf::filter2D^^^<0,3,3,0,0,1080,1920,1^^^> -stub C:/LS1/LS1/Debug/_sds/.llvm/w1_xf_filter2D.cfrewrite -o C:/LS1/LS1/Debug/_sds/swstubs/xf_custom_convolution_hpp.cpp C:/LS1/zybo_z7_20/sw/linux/linux/inc/include/imgproc/xf_custom_convolution.hpp -- -c -IC:/LS1/LS1/src/filter2d -IC:/LS1/LS1/src -IC:/LS1/zybo_z7_20/sw/linux/linux/inc/include -IC:/LS1/zybo_z7_20/sw/sysroot/usr/include/c++/6.2.1 -IC:/LS1/zybo_z7_20/sw/sysroot/usr/include/c++/6.2.1/arm-xilinx-linux-gnueabi -IC:/LS1/zybo_z7_20/sw/sysroot/usr/include/c++/6.2.1/backward -IC:/LS1/zybo_z7_20/sw/sysroot/usr/include -IC:/LS1/zybo_z7_20/sw/sysroot/usr/include/glib-2.0 -IC:/LS1/zybo_z7_20/sw/sysroot/usr/lib/glib-2.0/include -DHLS_NO_XIL_FPO_LIB -D__ARM_PCS_VFP -Wall -O0 -g -fmessage-length=0 -Wno-overloaded-virtual -Wno-unused-label -Wno-strict-overflow -Wno-uninitialized -Wno-unused-function -Wno-unused-variable -Wno-unknown-attributes -Wno-unused-local-typedefs -Wno-sign-compare -MMD -MP -D __SDSCC__ -target arm-linux-gnueabihf -mcpu=cortex-a9 -mfpu=vfpv3 -mfloat-abi=hard -O0 -g -w -I C:/LS1/zybo_z7_20/sw/linux/linux/inc/include -I C:/Xilinx/SDx/2017.4/target/aarch32-linux/include -D HLS_NO_XIL_FPO_LIB -I C:/Xilinx/Vivado/2017.4/include -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include/c++/6.2.1 -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include/c++/6.2.1/arm-linux-gnueabihf -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include/c++/6.2.1/backward -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/lib/gcc/arm-linux-gnueabihf/6.2.1/include -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/lib/gcc/arm-linux-gnueabihf/6.2.1/include-fixed -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include -IC:/Xilinx/SDK/2017.4/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/libc/usr/include -std=c++11
Compile hardware access API functions
arm-linux-gnueabihf-gcc -I C:/LS1/zybo_z7_20/sw/linux/linux/inc/include -I C:/Xilinx/SDx/2017.4/target/aarch32-linux/include -D HLS_NO_XIL_FPO_LIB -I C:/Xilinx/Vivado/2017.4/include -c C:/LS1/LS1/Debug/_sds/swstubs/portinfo.c
arm-linux-gnueabihf-g++ -I C:/LS1/zybo_z7_20/sw/linux/linux/inc/include -I C:/Xilinx/SDx/2017.4/target/aarch32-linux/include -D HLS_NO_XIL_FPO_LIB -I C:/Xilinx/Vivado/2017.4/include -c C:/LS1/LS1/Debug/_sds/swstubs/cf_stub.c
arm-linux-gnueabihf-ar crs C:/LS1/LS1/Debug/_sds/swstubs/libxlnk_stub.a C:/LS1/LS1/Debug/_sds/swstubs/portinfo.o C:/LS1/LS1/Debug/_sds/swstubs/cf_stub.o
Compile accelerator stub functions
arm-linux-gnueabihf-g++ -c hls_helper.cpp -IC:/LS1/LS1/src/hls_helper -IC:/LS1/LS1/src -IC:/LS1/zybo_z7_20/sw/linux/linux/inc/include -IC:/LS1/zybo_z7_20/sw/sysroot/usr/include/c++/6.2.1 -IC:/LS1/zybo_z7_20/sw/sysroot/usr/include/c++/6.2.1/arm-xilinx-linux-gnueabi -IC:/LS1/zybo_z7_20/sw/sysroot/usr/include/c++/6.2.1/backward -IC:/LS1/zybo_z7_20/sw/sysroot/usr/include -IC:/LS1/zybo_z7_20/sw/sysroot/usr/include/glib-2.0 -IC:/LS1/zybo_z7_20/sw/sysroot/usr/lib/glib-2.0/include -DHLS_NO_XIL_FPO_LIB -D__ARM_PCS_VFP -Wall -O0 -g -fmessage-length=0 -Wno-overloaded-virtual -Wno-unused-label -Wno-strict-overflow -Wno-uninitialized -Wno-unused-function -Wno-unused-variable -Wno-unknown-attributes -Wno-unused-local-typedefs -Wno-sign-compare -MMD -MP -D __SDSCC__ -I C:/LS1/zybo_z7_20/sw/linux/linux/inc/include -I C:/Xilinx/SDx/2017.4/target/aarch32-linux/include -D HLS_NO_XIL_FPO_LIB -I C:/Xilinx/Vivado/2017.4/include -o hls_helper.o
from C:/LS1/LS1/src/hls_helper/hls_helper.h:4,
from hls_helper.cpp:3:
arm-linux-gnueabihf-g++ -c xf_custom_convolution_hpp.cpp -IC:/LS1/LS1/src/filter2d -IC:/LS1/LS1/src -IC:/LS1/zybo_z7_20/sw/linux/linux/inc/include -IC:/LS1/zybo_z7_20/sw/sysroot/usr/include/c++/6.2.1 -IC:/LS1/zybo_z7_20/sw/sysroot/usr/include/c++/6.2.1/arm-xilinx-linux-gnueabi -IC:/LS1/zybo_z7_20/sw/sysroot/usr/include/c++/6.2.1/backward -IC:/LS1/zybo_z7_20/sw/sysroot/usr/include -IC:/LS1/zybo_z7_20/sw/sysroot/usr/include/glib-2.0 -IC:/LS1/zybo_z7_20/sw/sysroot/usr/lib/glib-2.0/include -DHLS_NO_XIL_FPO_LIB -D__ARM_PCS_VFP -Wall -O0 -g -fmessage-length=0 -Wno-overloaded-virtual -Wno-unused-label -Wno-strict-overflow -Wno-uninitialized -Wno-unused-function -Wno-unused-variable -Wno-unknown-attributes -Wno-unused-local-typedefs -Wno-sign-compare -MMD -MP -D __SDSCC__ -I C:/LS1/zybo_z7_20/sw/linux/linux/inc/include/imgproc -I C:/LS1/zybo_z7_20/sw/linux/linux/inc/include -I C:/Xilinx/SDx/2017.4/target/aarch32-linux/include -D HLS_NO_XIL_FPO_LIB -I C:/Xilinx/Vivado/2017.4/include -o xf_custom_convolution_hpp.o
from xf_custom_convolution_hpp.cpp:36:
arm-linux-gnueabihf-ar crs C:/LS1/LS1/Debug/_sds/swstubs/libLS1.a C:/LS1/LS1/Debug/_sds/swstubs/portinfo.o C:/LS1/LS1/Debug/_sds/swstubs/cf_stub.o C:/LS1/LS1/Debug/_sds/swstubs/hls_helper.o C:/LS1/LS1/Debug/_sds/swstubs/xf_custom_convolution_hpp.o
Preliminary link application ELF
arm-linux-gnueabihf-g++ C:/LS1/LS1/Debug/_sds/swstubs/hls_helper.o C:/LS1/LS1/Debug/_sds/swstubs/xf_custom_convolution_hpp.o C:/LS1/LS1/Debug/src/v4l2_helper/v4l2_helper.o C:/LS1/LS1/Debug/src/uio/uio_ll.o C:/LS1/LS1/Debug/src/filter2d/filter2d_cv.o C:/LS1/LS1/Debug/src/drm_helper/drm_helper.o C:/LS1/LS1/Debug/src/main.o C:/LS1/LS1/Debug/_sds/swstubs/filter2d_xf.o C:/LS1/LS1/Debug/_sds/swstubs/portinfo.o {--sysroot=C:\LS1\zybo_z7_20\sw\sysroot} -L=/lib -L=/usr/lib {-Wl,-rpath-link=C:\LS1\zybo_z7_20\sw\sysroot/lib,-rpath-link=C:\LS1\zybo_z7_20\sw\sysroot/usr/lib} -lglib-2.0 -ldrm -lv4l2subdev -lmediactl -lopencv_imgcodecs -lopencv_core -llzma -ltiff -lpng16 -lz -ljpeg -lopencv_imgproc -ldl -lrt -lwebp -lopencv_features2d -lncurses -lopencv_flann -L C:/Xilinx/SDx/2017.4/target/aarch32-linux/lib -LC:/LS1/LS1/Debug/_sds/swstubs -Wl,--start-group -Wl,--end-group -Wl,--start-group -lpthread -lsds_lib -lxlnk_stub -Wl,--end-group -o C:/LS1/LS1/Debug/_sds/swstubs/LS1.elf
arm-linux-gnueabihf-objcopy -R .xdinfo -R .xddata -R .xdasm -R .xdfcnmap -R .xdhlscore -R .xdif -R .xdparams -R .xdcore -R .xdsdata -R .xdpp C:/LS1/LS1/Debug/_sds/swstubs/LS1.elf
Enable generation of hardware programming files
Enable generation of boot files
Calling VPL for partition 0
C:/Xilinx/SDx/2017.4/bin/vpl --iprepo C:/LS1/LS1/Debug/_sds/iprepo/repo --iprepo C:/Xilinx/SDx/2017.4/data/ip/xilinx --platform C:/LS1/zybo_z7_20/zybo_z7_20.xpfm --temp_dir C:/LS1/LS1/Debug/_sds/p0 --output_dir C:/LS1/LS1/Debug/_sds/p0/vpl --input_file C:/LS1/LS1/Debug/_sds/p0/.xsd/top.bd.tcl --target hw --save_temps --kernels write_output_gray:w1_xf_filter2D --webtalk_flag SDSoC --remote_ip_cache C:/LS1/ip_cache

****** vpl v2017.4 (64-bit)
**** SW Build 2086221 on Fri Dec 15 20:55:39 MST 2017
** Copyright 1986-2017 Xilinx, Inc. All Rights Reserved.

INFO: [VPL 60-895] Target platform: C:/LS1/zybo_z7_20\zybo_z7_20.xpfm
INFO: [VPL 60-423] Target device: zybo_z7_20
INFO: [VPL 60-251] Hardware accelerator integration...

===>The following messages were generated while creating FPGA bitstream. Log file:C:/LS1/LS1/Debug/_sds/p0/_vpl/ipi/vivado.log :
ERROR: [VPL 5-336] This command cannot be run, as the BD-design is locked. Locked reason(s):
* Block design contains locked IPs. Please run report_ip_status for more details and recommendations on how to fix this issue.
List of locked IPs:
zybo_z7_20_mipi_csi2_rx_subsystem_0_0

ERROR: [VPL 60-341] Hardware accelerator integration failed. Aborting build_system. The following log file is available for debugging 'C:/LS1/LS1/Debug/_sds/p0/_vpl/ipi/vivado.log'. Contact your local Xilinx representative and provide the log file for further assistance.
ERROR: [VPL 60-806] Failed to finish platform linker
ERROR: [SdsCompiler 83-5019] Exiting sds++ : Error when calling 'C:/Xilinx/SDx/2017.4/bin/vpl --iprepo C:/LS1/LS1/Debug/_sds/iprepo/repo --iprepo C:/Xilinx/SDx/2017.4/data/ip/xilinx --platform C:/LS1/zybo_z7_20/zybo_z7_20.xpfm --temp_dir C:/LS1/LS1/Debug/_sds/p0 --output_dir C:/LS1/LS1/Debug/_sds/p0/vpl --input_file C:/LS1/LS1/Debug/_sds/p0/.xsd/top.bd.tcl --target hw --save_temps --kernels write_output_gray:w1_xf_filter2D --webtalk_flag SDSoC --remote_ip_cache C:/LS1/ip_cache '
sds++ log file saved as C:/LS1/LS1/Debug/_sds/reports/sds.log
ERROR: [SdsCompiler 83-5004] Build failed
sds++ completed at Fri Mar 15 01:49:58 -0400 2019

/***********************************************************************************************/

bogdan.deac · March 14, 2019

From the log file that you have provided I figured out that the problem is not related to reVision platform nor project itself. It is a Xilinx general issue that manifest on Windows platforms.

The following message from the log file is explicit

Quote

INFO: [ProjectBase 1-489] The host OS only allows 260 characters in a normal path. The project is stored in a path with more than 80 characters. If you experience issues with IP, Block Designs, or files not being found, please consider moving the project to a location with a shorter path. Alternately consider using the OS subst command to map part of the path to a drive letter.

This info message is followed by some warning messages that in the end will cause the build to fail.

9 hours ago, Sameer120 said:

WARNING: [IP_Flow 19-2162] IP 'zybo_z7_20_axi_dynclk_0_0' is locked:
* IP definition 'axi_dynclk (1.0)' for IP 'zybo_z7_20_axi_dynclk_0_0' (customized with software release 2017.4) was not found in the IP Catalog.

9 hours ago, Sameer120 said:

WARNING: [BD 41-1753] The name 'axi_ic_processing_system7_0_M_AXI_GP1' you have specified is long. The Windows OS has path length limitations. It is recommended you use shorter names(less than 25 characters) to reduce the likelihood of issues when/if running on windows OS.

Because the path to those IPs is too long the system cannot find them and the build process fails.

As you can see here, it is a Vivado design problem.

You can find the solution here. Try to follow the steps from the link and rebuild the project. The warning messages about the path length should not appear again.

bogdan.deac · March 14, 2019

Did you create the SYSROOT environment variable? Did you restart the PC after variable creation?

Sameer120 · March 14, 2019

I downloaded the zip archive from release tab below link

https://github.com/Digilent/reVISION-Zybo-Z7-20/releases/download/v2017.4-3/reVISION-Zybo-Z7-20-2017.4-3.zip

bogdan.deac · March 14, 2019

5 minutes ago, Sameer120 said:

I started from live_IO template, I first include the custom plaform and then started building new project from template.

I followed steps specified in below readme

https://github.com/Digilent/reVISION-Zybo-Z7-20/tree/master/sdsoc

How did you get the reVision platform? Did you clone it from github OR did you downloaded the zip archive from releases tab?

Sameer120 · March 14, 2019

I started from live_IO template, I first include the custom plaform and then started building new project from template.

I followed steps specified in below readme

https://github.com/Digilent/reVISION-Zybo-Z7-20/tree/master/sdsoc

bogdan.deac · March 14, 2019

2 minutes ago, Sameer120 said:

Hi bogdan,

I ran the example of (revision-samples/live_IO/filter2d_pcam/) refer below link

https://github.com/Digilent/revision-samples/tree/cf507d7093a176609c6c9c1479944052b8d51660/live_IO/filter2d_pcam/src

The error in above log is during build, so the compile/build fails.

Operating System : Windows 10

SDx Vivado : 2017.4 Version

Thanks & Regards

Sameer

How did you import the project? Did you create an empty application and copied the github code into it OR did you start from the live_IO template?

Sameer120 · March 14, 2019

Hi bogdan,

I ran the example of (revision-samples/live_IO/filter2d_pcam/) refer below link

https://github.com/Digilent/revision-samples/tree/cf507d7093a176609c6c9c1479944052b8d51660/live_IO/filter2d_pcam/src

The error in above log is during build, so the compile/build fails.

Operating System : Windows 10

SDx Vivado : 2017.4 Version

Thanks & Regards

Sameer

bogdan.deac · March 14, 2019

Hi @Sameer120,

What example project did you run? Did it build properly? What OS do you use?

Sameer120 · March 14, 2019

Hi Jon,

Thanks for your support, please find below log file of SDSoC.

Sourcing tcl script 'C:/Users/samee/AppData/Roaming/Xilinx/Vivado/Vivado_init.tcl'
couldn't load library "features": this library or a dependent library could not be found in library path
while executing
"load features core"
(file "C:/Users/samee/AppData/Roaming/Xilinx/Vivado/Vivado_init.tcl" line 3)
source C:/SamWork/Per/Profile/Demo/Sam/L1_Sam_XFCV/L1_Sam_XFCV/Debug/_sds/p0/_vpl/ipi/ipirun.tcl -notrace
Creating Vivado project and starting FPGA synthesis.
--- DEBUG: source ./rebuild.tcl to create syn project
INFO: [ProjectBase 1-489] The host OS only allows 260 characters in a normal path. The project is stored in a path with more than 80 characters. If you experience issues with IP, Block Designs, or files not being found, please consider moving the project to a location with a shorter path. Alternately consider using the OS subst command to map part of the path to a drive letter.
Current project path is 'C:/SamWork/Per/Profile/Demo/Sam/L1_Sam_XFCV/L1_Sam_XFCV/Debug/_sds/p0/_vpl/ipi/syn'
INFO: [IP_Flow 19-234] Refreshing IP repositories
WARNING: [IP_Flow 19-2248] Failed to load user IP repository 'c:/SamWork/Per/Profile/Demo/Sam/L1_Sam_XFCV/L1_Sam_XFCV/Debug/_sds/p0/_vpl/zybo_z7_20.ipdefs/repo_0'; Can't find the specified path.
If this directory should no longer be in your list of user repositories, go to the IP Settings dialog and remove it.
INFO: [IP_Flow 19-2313] Loaded Vivado IP repository 'C:/Xilinx/Vivado/2017.4/data/ip'.
WARNING: [BD 41-1661] One or more IPs have been locked in the design 'zybo_z7_20.bd'. Please run report_ip_status for more details and recommendations on how to fix this issue.
List of locked IPs:
zybo_z7_20_axi_dynclk_0_0
zybo_z7_20_axi_i2s_adi_0_0
zybo_z7_20_rgb2dvi_1_0
zybo_z7_20_pwm_rgb_0
zybo_z7_20_dvi2rgb_1_0
zybo_z7_20_mipi_csi2_rx_subsystem_0_0

WARNING: [IP_Flow 19-2162] IP 'zybo_z7_20_axi_dynclk_0_0' is locked:
* IP definition 'axi_dynclk (1.0)' for IP 'zybo_z7_20_axi_dynclk_0_0' (customized with software release 2017.4) was not found in the IP Catalog.
Please select 'Report IP Status' from the 'Tools/Report' menu or run Tcl command 'report_ip_status' for more information.
WARNING: [IP_Flow 19-2162] IP 'zybo_z7_20_axi_i2s_adi_0_0' is locked:
* IP definition 'axi_i2s_adi (1.0)' for IP 'zybo_z7_20_axi_i2s_adi_0_0' (customized with software release 2017.4) was not found in the IP Catalog.
Please select 'Report IP Status' from the 'Tools/Report' menu or run Tcl command 'report_ip_status' for more information.
WARNING: [IP_Flow 19-2162] IP 'zybo_z7_20_dvi2rgb_1_0' is locked:
* IP definition 'dvi2rgb (1.8)' for IP 'zybo_z7_20_dvi2rgb_1_0' (customized with software release 2017.4) was not found in the IP Catalog.
Please select 'Report IP Status' from the 'Tools/Report' menu or run Tcl command 'report_ip_status' for more information.
WARNING: [IP_Flow 19-2162] IP 'zybo_z7_20_pwm_rgb_0' is locked:
* IP definition 'PWM (2.0)' for IP 'zybo_z7_20_pwm_rgb_0' (customized with software release 2017.4) was not found in the IP Catalog.
Please select 'Report IP Status' from the 'Tools/Report' menu or run Tcl command 'report_ip_status' for more information.
WARNING: [IP_Flow 19-2162] IP 'zybo_z7_20_rgb2dvi_1_0' is locked:
* IP definition 'rgb2dvi (1.4)' for IP 'zybo_z7_20_rgb2dvi_1_0' (customized with software release 2017.4) was not found in the IP Catalog.
Please select 'Report IP Status' from the 'Tools/Report' menu or run Tcl command 'report_ip_status' for more information.
WARNING: [IP_Flow 19-2162] IP 'bd_894b_rx_0' is locked:
* IP 'bd_894b_rx_0' requires one or more mandatory licenses but no valid licenses were found. However license checkpoints may prevent use of this IP in some tool flows.
Please select 'Report IP Status' from the 'Tools/Report' menu or run Tcl command 'report_ip_status' for more information.
WARNING: [IP_Flow 19-2162] IP 'zybo_z7_20_mipi_csi2_rx_subsystem_0_0' is locked:
* IP 'zybo_z7_20_mipi_csi2_rx_subsystem_0_0' requires one or more mandatory licenses but no valid licenses were found. However license checkpoints may prevent use of this IP in some tool flows.
* IP 'zybo_z7_20_mipi_csi2_rx_subsystem_0_0' contains one or more locked subcores.
Please select 'Report IP Status' from the 'Tools/Report' menu or run Tcl command 'report_ip_status' for more information.
import_files: Time (s): cpu = 00:00:14 ; elapsed = 00:00:34 . Memory (MB): peak = 375.242 ; gain = 90.418
INFO: Project created:syn
--- DEBUG: setting ip_repo_paths: C:/SamWork/Per/Profile/Demo/Sam/L1_Sam_XFCV/L1_Sam_XFCV/Debug/_sds/iprepo/repo C:/Xilinx/SDx/2017.4/data/ip/xilinx ./.local_dsa/iprepo C:/Xilinx/SDx/2017.4/data/cache/xilinx ./.local_dsa/ipcache C:/Xilinx/SDx/2017.4/data/ip/xilinx
--- DEBUG: update_ip_catalog
INFO: [IP_Flow 19-234] Refreshing IP repositories
INFO: [IP_Flow 19-1700] Loaded user IP repository 'c:/SamWork/Per/Profile/Demo/Sam/L1_Sam_XFCV/L1_Sam_XFCV/Debug/_sds/iprepo/repo'.
INFO: [IP_Flow 19-1700] Loaded user IP repository 'c:/Xilinx/SDx/2017.4/data/ip/xilinx'.
INFO: [IP_Flow 19-1700] Loaded user IP repository 'c:/SamWork/Per/Profile/Demo/Sam/L1_Sam_XFCV/L1_Sam_XFCV/Debug/_sds/p0/_vpl/ipi/.local_dsa/iprepo'.
INFO: [IP_Flow 19-1700] Loaded user IP repository 'c:/Xilinx/SDx/2017.4/data/cache/xilinx'.
INFO: [IP_Flow 19-1700] Loaded user IP repository 'c:/SamWork/Per/Profile/Demo/Sam/L1_Sam_XFCV/L1_Sam_XFCV/Debug/_sds/p0/_vpl/ipi/.local_dsa/ipcache'.
WARNING: [IP_Flow 19-2207] Repository 'c:/Xilinx/SDx/2017.4/data/ip/xilinx' already exists; ignoring attempt to add it again.
INFO: [IP_Flow 19-1700] Loaded user IP repository 'c:/Xilinx/SDx/2017.4/data/ip/xilinx'.
update_ip_catalog: Time (s): cpu = 00:00:06 ; elapsed = 00:00:07 . Memory (MB): peak = 562.063 ; gain = 186.820
--- DEBUG: config_ip_cache -use_cache_location C:/SamWork/Per/Profile/Demo/Sam/L1_Sam_XFCV/ip_cache
--- DEBUG: open_bd_design -auto_upgrade [get_files zybo_z7_20.bd]
Adding cell -- digilentinc.com:ip:axi_dynclk:1.0 - axi_dynclk_0
Adding cell -- xilinx.com:ip:axi_gpio:2.0 - axi_gpio_eth
Adding cell -- xilinx.com:ip:axi_gpio:2.0 - axi_gpio_led
Adding cell -- xilinx.com:ip:axi_gpio:2.0 - axi_gpio_sw_btn
Adding cell -- xilinx.com:ip:axi_gpio:2.0 - axi_gpio_video
Adding cell -- analog.com:user:axi_i2s_adi:1.0 - axi_i2s_adi_0
Adding cell -- xilinx.com:ip:axi_vdma:6.3 - axi_vdma_0
Adding cell -- xilinx.com:ip:axi_vdma:6.3 - axi_vdma_1
Adding cell -- xilinx.com:ip:axis_subset_converter:1.1 - axis_subset_converter_in
Adding cell -- xilinx.com:ip:axis_subset_converter:1.1 - axis_subset_converter_out
Adding cell -- xilinx.com:ip:clk_wiz:5.4 - clk_wiz_0
Adding cell -- digilentinc.com:ip:dvi2rgb:1.8 - dvi2rgb_1
Adding cell -- xilinx.com:ip:proc_sys_reset:5.0 - proc_sys_reset_0
Adding cell -- xilinx.com:ip:processing_system7:5.5 - processing_system7_0
Adding cell -- digilentinc.com:IP:PWM:2.0 - pwm_rgb
Adding cell -- digilentinc.com:ip:rgb2dvi:1.4 - rgb2dvi_1
Adding cell -- xilinx.com:ip:proc_sys_reset:5.0 - psr_fclk0
Adding cell -- xilinx.com:ip:proc_sys_reset:5.0 - psr_fclk1
Adding cell -- xilinx.com:ip:v_axi4s_vid_out:4.0 - v_axi4s_vid_out_0
Adding cell -- xilinx.com:ip:v_tc:6.1 - v_tc_in
Adding cell -- xilinx.com:ip:v_tc:6.1 - v_tc_out
Adding cell -- xilinx.com:ip:v_vid_in_axi4s:4.0 - v_vid_in_axi4s_0
Adding cell -- xilinx.com:ip:xadc_wiz:3.3 - xadc_wiz_0
Adding cell -- xilinx.com:ip:xlconcat:2.1 - xlconcat_0
Adding cell -- xilinx.com:ip:xlconstant:1.1 - xlconstant_0
Adding cell -- xilinx.com:ip:xlconstant:1.1 - xlconstant_1
Adding cell -- xilinx.com:ip:proc_sys_reset:5.0 - psr_clkwiz2
Adding cell -- xilinx.com:ip:proc_sys_reset:5.0 - psr_clkwiz5
Adding cell -- xilinx.com:ip:proc_sys_reset:5.0 - psr_clkwiz4
Adding cell -- xilinx.com:ip:proc_sys_reset:5.0 - psr_clkwiz3
Adding cell -- xilinx.com:ip:util_ds_buf:2.1 - util_bufg_fclk1
Adding cell -- xilinx.com:ip:mipi_csi2_rx_subsystem:3.0 - mipi_csi2_rx_subsystem_0
Adding cell -- xilinx.com:ip:axis_subset_converter:1.1 - axis_subset_converter_0
Adding cell -- xilinx.com:ip:v_frmbuf_wr:2.0 - v_frmbuf_wr_0
Adding cell -- xilinx.com:ip:axi_iic:2.0 - axi_iic_0
Adding cell -- xilinx.com:ip:axi_data_fifo:2.1 - axi_data_fifo_0
Adding cell -- xilinx.com:ip:xlslice:1.0 - PS_GPIO_0
Adding cell -- xilinx.com:ip:xlslice:1.0 - PS_GPIO_2
Adding cell -- xilinx.com:ip:xlslice:1.0 - PS_GPIO_3
Adding cell -- xilinx.com:ip:axis_data_fifo:1.1 - axis_data_fifo_0
WARNING: [BD 41-1731] Type mismatch between connected pins: /axi_dynclk_0/LOCKED_O(undef) and /rgb2dvi_1/aRst_n(rst)
WARNING: [BD 41-1731] Type mismatch between connected pins: /clk_wiz_0/clk_out1(clk) and /axi_i2s_adi_0/DATA_CLK_I(undef)
WARNING: [BD 41-1731] Type mismatch between connected pins: /dvi2rgb_1/aPixelClkLckd(undef) and /proc_sys_reset_0/aux_reset_in(rst)
Adding cell -- xilinx.com:ip:axi_protocol_converter:2.1 - auto_pc
Adding cell -- xilinx.com:ip:axi_crossbar:2.1 - xbar
Adding cell -- xilinx.com:ip:axi_protocol_converter:2.1 - auto_pc
Adding cell -- xilinx.com:ip:axi_crossbar:2.1 - xbar
Adding cell -- xilinx.com:ip:axi_register_slice:2.1 - m00_regslice
Adding cell -- xilinx.com:ip:axi_protocol_converter:2.1 - auto_pc
Adding cell -- xilinx.com:ip:axi_register_slice:2.1 - s01_regslice
Adding cell -- xilinx.com:ip:axi_register_slice:2.1 - s00_regslice
Successfully read diagram <zybo_z7_20> from BD file <C:/SamWork/Per/Profile/Demo/Sam/L1_Sam_XFCV/L1_Sam_XFCV/Debug/_sds/p0/_vpl/ipi/syn/syn.srcs/sources_1/bd/zybo_z7_20/zybo_z7_20.bd>
--- DEBUG: source ./top.bd.tcl
WARNING: [Coretcl 2-1042] No IP was identified for upgrade.
CRITICAL WARNING: [BD 41-737] Cannot set the parameter C_S_AXIS_S2MM_TDATA_WIDTH on /dm_1. It is read-only.
create_bd_cell: Time (s): cpu = 00:01:18 ; elapsed = 00:01:19 . Memory (MB): peak = 769.891 ; gain = 206.176
WARNING: [IP_Flow 19-4684] Expected long value for param S_AXIS_BRAM_0_ADDR_WIDTH but, float/scientific notation value 2.0 is provided. The value is converted to long type(2)
WARNING: [IP_Flow 19-4684] Expected long value for param S_AXIS_BRAM_0_ADDR_WIDTH but, float/scientific notation value 5.0 is provided. The value is converted to long type(5)
create_bd_cell: Time (s): cpu = 00:01:25 ; elapsed = 00:01:25 . Memory (MB): peak = 915.109 ; gain = 125.750
WARNING: [BD 41-1753] The name 'axi_ic_processing_system7_0_M_AXI_GP1' you have specified is long. The Windows OS has path length limitations. It is recommended you use shorter names(less than 25 characters) to reduce the likelihood of issues when/if running on windows OS.
WARNING: [BD 41-1753] The name 'axi_ic_processing_system7_0_S_AXI_HP2' you have specified is long. The Windows OS has path length limitations. It is recommended you use shorter names(less than 25 characters) to reduce the likelihood of issues when/if running on windows OS.
WARNING: [BD 41-1753] The name 'axi_ic_processing_system7_0_S_AXI_HP3' you have specified is long. The Windows OS has path length limitations. It is recommended you use shorter names(less than 25 characters) to reduce the likelihood of issues when/if running on windows OS.
WARNING: [BD 5-235] No pins matched 'get_bd_pins /dm_0/mm2s_prmry_resetn_out_n'
WARNING: [BD 5-235] No pins matched 'get_bd_pins /dm_1/s2mm_prmry_resetn_out_n'
--- DEBUG: save_bd_design
Wrote : <C:/SamWork/Per/Profile/Demo/Sam/L1_Sam_XFCV/L1_Sam_XFCV/Debug/_sds/p0/_vpl/ipi/syn/syn.srcs/sources_1/bd/zybo_z7_20/zybo_z7_20.bd>
save_bd_design: Time (s): cpu = 00:00:10 ; elapsed = 00:00:15 . Memory (MB): peak = 1261.391 ; gain = 221.570
--- DEBUG: inserting profiling cores
--- DEBUG: inserting SystemILA debug cores
--- DEBUG: insert_chipscope_debug: No chipscope_debugs dict name - nothing to insert
--- DEBUG: assign_bd_address
</processing_system7_0/S_AXI_HP2/HP2_DDR_LOWOCM> is being mapped into </dm_0/Data_MM2S> at <0x00000000 [ 1G ]>
</processing_system7_0/S_AXI_HP2/HP2_DDR_LOWOCM> is being mapped into </dm_0/Data_SG> at <0x00000000 [ 1G ]>
</processing_system7_0/S_AXI_HP3/HP3_DDR_LOWOCM> is being mapped into </dm_1/Data_S2MM> at <0x00000000 [ 1G ]>
</processing_system7_0/S_AXI_HP3/HP3_DDR_LOWOCM> is being mapped into </dm_1/Data_SG> at <0x00000000 [ 1G ]>
</dm_0/S_AXI_LITE/Reg> is being mapped into </processing_system7_0/Data> at <0x80400000 [ 64K ]>
</dm_1/S_AXI_LITE/Reg> is being mapped into </processing_system7_0/Data> at <0x80410000 [ 64K ]>
</dm_2/S_AXI/Mem0> is being mapped into </processing_system7_0/Data> at <0x83C00000 [ 64K ]>
</w1_xf_filter2D_1_if/S_AXI/reg0> is being mapped into </processing_system7_0/Data> at <0x83C10000 [ 64K ]>
</write_output_gray_1_if/S_AXI/reg0> is being mapped into </processing_system7_0/Data> at <0x83C20000 [ 64K ]>
--- DEBUG: validate_bd_design -force
ERROR: [BD 5-336] This command cannot be run, as the BD-design is locked. Locked reason(s):
* Block design contains locked IPs. Please run report_ip_status for more details and recommendations on how to fix this issue.
List of locked IPs:
zybo_z7_20_mipi_csi2_rx_subsystem_0_0

ERROR: [Common 17-39] 'validate_bd_design' failed due to earlier errors.

while executing
"validate_bd_design -force"
(procedure "ocl_util::init_ocl_project_unip" line 202)
invoked from within
"ocl_util::init_ocl_project_unip $dsa_info $config_info $clk_info $debug_profile_info"
(file "C:/SamWork/Per/Profile/Demo/Sam/L1_Sam_XFCV/L1_Sam_XFCV/Debug/_sds/p0/_vpl/ipi/ipirun.tcl" line 172)
INFO: [Common 17-206] Exiting Vivado at Wed Mar 13 01:52:13 2019...

List of locked IPs:
zybo_z7_20_mipi_csi2_rx_subsystem_0_0

ERROR: [Common 17-39] 'validate_bd_design' failed due to earlier errors.

while executing
"validate_bd_design -force"
(procedure "ocl_util::init_ocl_project_unip" line 202)
invoked from within
"ocl_util::init_ocl_project_unip $dsa_info $config_info $clk_info $debug_profile_info"
(file "C:/SamWork/Per/Profile/Demo/Sam/L1_Sam_XFCV/L1_Sam_XFCV/Debug/_sds/p0/_vpl/ipi/ipirun.tcl" line 172)
INFO: [Common 17-206] Exiting Vivado at Wed Mar 13 01:52:13 2019...

Thanks & Regards

Sameer

jpeyron · March 13, 2019

Hi @Sameer120,

I have reached out to more experienced engineers about this thread. In the mean time can you post the errors you are getting.

thank you,

Jon

Zybo Z7 -20 Board OpenCV Fucntions

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