Question about adding Pmod

[Mingfei]

Hi everyone,

I'm really new to digilent board. I'm using the PYNQ-Z1 board to do my final project. What I'm gonna build is basically an oscilloscope. I use Pmod-AD5 to measure voltage, then use HDMI OUT port on PYNQ-Z1 to display the voltage value. Because the PYNQ board has the same board files as ARTY-Z7, so my project is based on Arty Z7 HDMI Out Demo:https://reference.digilentinc.com/learn/programmable-logic/tutorials/pmod-ips/start . The HDMI demo works fine.

Then I followed this link: https://reference.digilentinc.com/learn/programmable-logic/tutorials/pmod-ips/start to use Pmod. I first test the Pmod-AD5 by creating a new project with one ZYNQ processor connected to Pmod AD5 and it works fine.

However, If I added Pmod to HDMI demo, I can only get a constant voltage value from AD5 and it doesn't change no matter what voltage I input. I have attached the critical warning as attachment. It seems like a problem with constraints. So may I ask whether if I should add Pmod constraints and how to do that?  

I also attached the block diagrams of HDMI demo, my test for Pmod, and the HDMI demo with Pmod. Thank you so much for helping me.

[jpeyron]

Hi @Mingfei,

Welcome to the Digilent forums!

I would suggest starting with a fresh non-altered Arty-Z7-20 HDMI-OUT project.

Once you have opened the Arty-Z7-20 HDMI-OUT project in Vivado 2018.2 then:

1) Download the Vivado library.

2) In Vivado 2018.2 click on IP in project setting select repository and add the path to the vivado library.

3) Then right click on the pmod port of your choice and select the Pmod AD5.

4) Double click into the zynq processor select pl clocks and add a 50 MHz clock and select OK. 

5) Connect the 50 MHz clock to the ext_spi_clk pin on the Pmod AD5 then run connection automation.

6) Right click on the wrapper and update the hierarchy. 

7) generate bitstream  

cheers,

Jon

[Mingfei]

Hi Jon,

Thanks for answering my question. I followed your instruction step by step, but I still get the same result. In SDK, I used the demo code. When running the program, I still get a constant value for the voltage in SDK console.

However, if I start a new project and only use Pmod AD5 and ZYNQ processor, Pmod AD5 works fine and I can get a small changing voltage ( due to noise I think).

I have attached the result for both. I'm confused that, in SDK, will the demo code work if ZYNQ processor is not only connected to Pmod AD5? Or do I have to make some changes to the code to make it work? Because the demo code works fine if I don't use the HDMI demo. 

Thank you so much

[jpeyron]

Hi @Mingfei,

I do not readily see any conflicts between the PmodAD5 IP Core and the IP Cores used in the HDMI-OUT.   Early next week i should have some bandwidth to try and get a project going with the HDMI-OUT and PmodAD5 IP Core.  

You could also try exposing the pins between the Pmod AD5 and the Pmod Port through a bread board to see what is actually being sent and received.  You could also add the ILA core to help debug the issue.

thank you,

Jon

[Mingfei]

Hi Jon,

It seems that Pmod AD5 IP cores can not work with IP cores in the HDMI out. 

I looked at other people who have similar critical warnings and they suggest to delete the original wrapper and generate a new one. I tried that and got rid of the critical warnings. However, an error occurred when generating bitstream. The errors are shown below:

So I referred to HDMI-OUT demo's implementation design and assigned these three pins manually. Then I got another error saying about conflicting voltage: 

 

I'm wondering that does this mean these two IPs cannot be used together?

 

Thank you for helping me!

[jpeyron]

Hi @Mingfei,

Here is a verified HDMI-OUT with the PmodAD5 IP core added to the block design using Vivado 2018.2. I started with a fresh HDMI-out project. Then I replace the vivado library folder in the project folder here:

\vivado_proj\Arty-Z7-20-hdmi-out.ipdefs\repo_0

with the vivado library from here. 

1) open the project in Vivado 2018.2. 

2) upgrade the IP core's by selecting reports->report IP status.

3) add the PmodAD5 IP Core

4) open the zynq processor and add a 50 MHZ clock

5) Connect the 50 MHz clock to the ext_spi_clk pin on the PmodAD5 IP Core

6) run connection automation

7) re-fresh the hierarchy and or delete and re-create the wrapper to ensure the PmodAD5 IP core is included in the wrapper.

8). update the XDC names to reflect the names in the wrapper. We upgraded some of the HDMI IP Cores and some of the Pin names are slightly different. We capitalized some of the pin names.

9) generate a bitstream, export hardware including bitstream, launch SDK.

10) create and empty application in sdk and add the PmodAD5 main.c to the scr folder of the application.

11) program fpga and right click on the application and select run as ->Launch on hardware(system debugger)

thank you,

Jon

 

[Mingfei]

Hi Joe,

Thank you so much for you help! It works! So I can now continue my final project.

Mingfei

[jpeyron]

Hi @Mingfei,

Glad to hear you were able to get the project working.

cheers,

Jon