What that error means is that you cannot have two different I/O standards, input output voltage standards in the same bank. To fix it you need to go to your XDC file for the project and change the I/O standards that say LVCMOS18 to LVCMOS33.
You can always use the I/O standards listed in the Basys 3 master XDC file on the product page.
[DRC BIVC-1] Bank IO standard Vcc: Conflicting Vcc voltages in bank 35. For example, the following two ports in this bank have conflicting VCCOs:
ddr3_sdram_0_ck_p[0] (DIFF_SSTL135, requiring VCCO=1.350) and sys_clock (LVCMOS33, requiring VCCO=3.300)
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Ahmed Alfadhel
Hi @Commanderfranz,
How to solve this error:
[DRC BIVC-1] Bank IO standard Vcc: Conflicting Vcc voltages in bank 35. For example, the following two ports in this bank have conflicting VCCOs:
ddr3_sdram_0_ck_p[0] (DIFF_SSTL135, requiring VCCO=1.350) and sys_clock (LVCMOS33, requiring VCCO=3.300)
Any comments I will appreciate it.
thanks
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