sagarp Posted February 5, 2019 Share Posted February 5, 2019 we want 2 connect 2 fpga. the master and slave connection should be established. The signal from one should be sent to the other. please provide code and connection details for the same. Link to comment Share on other sites More sharing options...
jpeyron Posted February 6, 2019 Share Posted February 6, 2019 Hi @sagarp, Welcome to the forums! Sounds like a start to an interesting project. We currently do not have the bandwidth to create this project. We do have the bandwidth to help you create this project. Could you be more specific about your project I.E. 1) What development boards are you using? 2) There are a few different ways to accomplish this task. How are you wanting to design your project? a) Using HDL (VHDL/Verilog). b) Using Microblaze/ZYNQ processor and the AXI IIC IP Core. c) If your using ZYNQ boards embedded linux is an option like the Petalinux projects we have here. 3) Is there any other limitations for your project? 4) What version of Vivado are you using? With a quick search I found this Instructable here that might be helpful . thank you, Jon Link to comment Share on other sites More sharing options...
Question
sagarp
we want 2 connect 2 fpga. the master and slave connection should be established. The signal from one should be sent to the other. please provide code and connection details for the same.
Link to comment
Share on other sites
1 answer to this question
Recommended Posts
Archived
This topic is now archived and is closed to further replies.