How to properly share DDR memory between two cores of Arty

[Mahdi]

Hello,

I am wondering what is the best way to share a big chunk of memory between two cores of Arty-Z7-10? Note that I have already gone through the XAPP1079 of Xilinx, however this tutorial does not really share the DDR memory between two cores. It only uses OCM to share a semaphore between two cores, so two cores can share the terminal.

To give you more detail on what my goal is: I want to read a big chunk of data (something in oder of 15 - 30 MB) on CPU#0 and put that into DDR memory, and then let the CPU#1 know when I am done via a flag (which I know how to do with OCM). Following this, I want CPU#1 to access the data that CPU#0 put in DDR and write it to the SD card, while CPU#0 starts to read the 2nd chunk of data. To do this, it is clear that I need to modify the ldscript of two cores, so they share part of the memory. I wonder if anyone has done such kind of thing before and have any suggestion?

Regards,

Mahdi

[jpeyron]

Hi @Mahdi,

I have not worked with the ZYNQ processors in this way.  I did find a YouTube that might be helpful here. Hopefully one of the more experienced community members will have some input. I would also suggest reaching out to Xilinx support as well.

thank you,

Jon

 

[kwilber]

Would it be possible to run linux for your application? Since linux on the Arty Z7 already uses both cores and shared memory, you could use traditional multi threaded techniques to pin threads to cores and share data.

[Mahdi]

Hi @jpeyron

I looked at the link you shared, but it does not seem to share DDR memory between the two cores at all. Each application runs on a single core independent of the other one and has its own dedicated memory. Thanks for sharing it anyway.

Mahdi

[Mahdi]

Hi @kwilber

Using Linux to multi thread my application is similar to the behavior I am trying to duplicate with my bare-metal application, but I am worried the overhead of full Linux OS will cause more problems with meeting my data throughput requirements. If it is possible to share memory between Linux and a bare-metal application and has been done already, why is it so difficult to do it with two bare-metal application? I just do not find a useful tutorial on how to do this.

Mahdi

[jpeyron]

Hi @Mahdi,

I found a few xilinx forum thread here, here and a tutorial here. This tutorial says that it shows how to create an IP with a master full AXI4 interface used to read and write from the Programmable Logic (PL) to the On-Chip Memory (OCM) of the Processing System (PS) using the zynq S_AXI_HP0 slave interface.

thank you,

Jon