vivado 2018.2 zybo z7 critical warnings, no synth

[reyk]

Building an IP integrator design in vivado 2018.2 using the board files for Zybo Z7 throws the following critical warnings

 

validate_bd_design
CRITICAL WARNING: [PSU-1]  Parameter : PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_0 has negative value -0.050 . PS DDR interfaces might fail when entering negative DQS skew values. 
CRITICAL WARNING: [PSU-2]  Parameter : PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_1 has negative value -0.044 . PS DDR interfaces might fail when entering negative DQS skew values. 
CRITICAL WARNING: [PSU-3]  Parameter : PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_2 has negative value -0.035 . PS DDR interfaces might fail when entering negative DQS skew values. 
CRITICAL WARNING: [PSU-4]  Parameter : PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_3 has negative value -0.100 . PS DDR interfaces might fail when entering negative DQS skew values

Is there a workaround to build a platform to run linux on Zybo Z7?

[theUltimateSource]

these warnings can be ignored.

[jpeyron]

Hi @reyk,

Here is the Hardware errata section of the reference manual for the zybo-Z7 that explains these errors. As @theUltimateSource stated you can ignore these warnings.

thank you,

Jon