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malkauns

PCAM elf on PetaLinux from SD card

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Hi all,  I am able to successfully build the PCAM demo project for the Zybo Z7-10 and can verify that it works.  After importing the project into the SDK and letting it build, sdk/pcam_vdma_hdmi/Debug/pcam_vdma_hdmi.elf is generated.  I would like to be able to run this application from with PetaLinux booted from an SD card so that I can control the camera as well as performing other operations within Linux.  If I try to run the generated pcam_vdma_hdmi.elf as it is I get an "Illegal instruction" error message.  What do I have to do to make this work from within a booted PetaLinux?

Edited by malkauns

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Hi @malkauns,

I have reached out to more experienced embedded linux engineers to see if they would have any input for you. It may be a little bit before you receive a response. The more experience embedded engineers are out of the office this week.

thank you,

Jon

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We have a PCAM demo in the Petalinux-Zybo-Z7-20 project. The PCAM support is not included in the Petalinux-Zybo-Z7-10 project because they were intended for SDSoC and the FPGA in the Z7-10 is too small for SDSoC usage.

We modified the Z7-20 Vivado project to work on the Z7-10 (system.hdf file attached.)

Follow these steps to have PCAM support on the Z7-10.

  1. Git clone  Petalinux-Zybo-Z7-20
  2. Unzip the attached system.hdf file in a folder and include the system.hdf in the unzipped folder itself. Copy & replace the folder contents into project-spec/hw-description of the petalinux project.
  3. Build the image with the petalinux-build command
  4. Follow the PCAM instructions at the bottom of the readme for Petalinux-Zybo-Z7-20

 

FYI, here are the steps to modifying the  Z7-20 Vivado project to work on the Z7-10. A SDSoC license is needed for generating the bitstream.

  1. Download the Zybq-Z7-20-base-linux project from https://github.com/Digilent/Zybo-Z7-20-base-linux and unzip.
  2. Download the Vivado library from https://github.com/Digilent/vivado-library and unzip it in the Zybq-Z7-20-base-linux project, in the \repo\vivado-library folder.
  3. Make sure you have the Zybo Z7 board support files in your Vivado installation. If you don’t have them, download them from https://github.com/Digilent/vivado-boards, unzip the downloaded file, and copy the contents from the \vivado-boards-master\new\board_files folder to your Vivado 2017.4 installation folder (e.g. C:\Xilinx\Vivado\2017.4\data\boards\board_files).
  4. Open Vivado 2017.4, select Tools -> Run Script and run the create_project.tcl script from the \proj folder inside the Zybq-Z7-20-base-linux folder.
  5. Change the target board in Viado, by selecting Settings -> Project Device -> Zybo Z7-10 -> OK. Save the project.
  6. You will need to regenerate the IPs used in this project, due to the board change. Tools -> Report IP Status -> Upgrade Selected.
  7. The Zybo Z7-10 board has one less RGB LED than Zybo Z7-20 boards. Therefore, you will need to do several change to the project:
    • In the Zybo-Z7-Master.xdc file, comment out the lines referring to RGB LED 5:
      #set_property -dict { PACKAGE_PIN Y11   IOSTANDARD LVCMOS33 } [get_ports { pwm_rgb[2] }]; #IO_L18N_T2_13 Sch=led5_r
      #set_property -dict { PACKAGE_PIN T5    IOSTANDARD LVCMOS33 } [get_ports { pwm_rgb[1] }]; #IO_L19P_T3_13 Sch=led5_g
      #set_property -dict { PACKAGE_PIN Y12   IOSTANDARD LVCMOS33 } [get_ports { pwm_rgb[0] }]; #IO_L20P_T3_13 Sch=led5_b
    • In the same XDC file, change the indexes of the lines referring to RGB LED 6, so they look like this:
      set_property -dict { PACKAGE_PIN V16   IOSTANDARD LVCMOS33 } [get_ports { pwm_rgb[2] }]; #IO_L18P_T2_34 Sch=led6_r
      set_property -dict { PACKAGE_PIN F17   IOSTANDARD LVCMOS33 } [get_ports { pwm_rgb[1] }]; #IO_L6N_T0_VREF_35 Sch=led6_g
      set_property -dict { PACKAGE_PIN M17   IOSTANDARD LVCMOS33 } [get_ports { pwm_rgb[0] }]; #IO_L8P_T1_AD10P_35 Sch=led6_b
    • In the project block diagram, double-click on pwm_rgb IP and change the Number of PWMs from 6 to 3. Select OK and save the project.
    • Also in the project block diagram, double click on the output from the pwm_rgb IP (pwm_rgb signal), select Properties and then change the LEFT parameter from 5 to 2. Save the project.
  8. It may have happened that no top-level wrapper was generated for your project. If so, right-click on the system_i block diagram and select Create HDL Wrapper…
  9. Then right-click on the newly-created wrapper and select Set As Top. Save the project.
  10. You can now generate the bitstream and you should not see any issues while doing that.

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