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Amin

Zybo-Z7-20 SDx 2018.2 building takes forever

Question

I wanted to run a simple program on my Zybo-Z7-20 (following this tutorial: link) using SDSoC, but the building takes forever and stuck on 25%.

Can someone help me?

 

I downloaded the platform for my board from here.

 

this is the console output :

00:25:38 **** Build of configuration Release for project lab1 ****
make pre-build main-build 
sdsoc_make_clean Release
' '
'Building file: ../src/madd.cpp'
'Invoking: SDS++ Compiler'
sds++ -Wall -O3 -I"../src" -c -fmessage-length=0 -MT"src/madd.o" -MMD -MP -MF"src/madd.d" -MT"src/madd.o" -o "src/madd.o" "../src/madd.cpp" -sds-hw mmult mmult.cpp  -clkid 0 -sds-end -sds-hw madd madd.cpp  -clkid 0 -sds-end -sds-sys-config linux -sds-proc linux -sds-pf "D:\Xilinx_Workspace\SDSoC-Zybo-Z7-20-v2017.4-1\zybo_z7_20"
Processing -sds-hw block for madd
Create data motion intermediate representation

D:\Xilinx_Workspace\lab1\Release>D:\Xilinx\SDx\2018.2\llvm-clang\win64\llvm\bin\clang.exe -I../src -Wall -fmessage-length=0 -MMD -MP -D SDSCC -target arm-linux-gnueabihf -mcpu=cortex-a9 -mfpu=vfpv3 -mfloat-abi=hard -O0 -g -I D:/Xilinx/SDx/2018.2/target/aarch32-linux/include -D HLS_NO_XIL_FPO_LIB -I D:/Xilinx/Vivado/2018.2/include -ID:/Xilinx/SDK/2018.2/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include/c++/7.2.1 -ID:/Xilinx/SDK/2018.2/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include/c++/7.2.1/arm-linux-gnueabihf -ID:/Xilinx/SDK/2018.2/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include/c++/7.2.1/backward -ID:/Xilinx/SDK/2018.2/gnu/aarch32/nt/gcc-arm-linux-gnueabi/lib/gcc/arm-linux-gnueabihf/7.2.1/include -ID:/Xilinx/SDK/2018.2/gnu/aarch32/nt/gcc-arm-linux-gnueabi/lib/gcc/arm-linux-gnueabihf/7.2.1/include-fixed -ID:/Xilinx/SDK/2018.2/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include -ID:/Xilinx/SDK/2018.2/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/libc/usr/include -std=c++11 -emit-llvm -S D:/Xilinx_Workspace/lab1/src/madd.cpp -o D:/Xilinx_Workspace/lab1/Release/_sds/.llvm/src/madd.s 

D:\Xilinx_Workspace\lab1\Release>exit /b 0 
Performing accelerator source linting for madd
Performing pragma generation

D:\Xilinx_Workspace\lab1\Release>D:\Xilinx\SDx\2018.2\llvm-clang\win64\llvm\bin\clang.exe -E -ID:/Xilinx_Workspace/lab1/src -Wall -fmessage-length=0 -MMD -MP -D SDSCC -m32 -D HLS_NO_XIL_FPO_LIB -I D:/Xilinx/SDx/2018.2/target/aarch32-linux/include -ID:/Xilinx_Workspace/lab1/src -D SDSVHLS -target arm-linux-gnueabihf -mcpu=cortex-a9 -mfpu=vfpv3 -mfloat-abi=hard -O0 -g -w -I D:/Xilinx/SDx/2018.2/target/aarch32-linux/include -D HLS_NO_XIL_FPO_LIB -I D:/Xilinx/Vivado/2018.2/include -ID:/Xilinx/SDK/2018.2/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include/c++/7.2.1 -ID:/Xilinx/SDK/2018.2/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include/c++/7.2.1/arm-linux-gnueabihf -ID:/Xilinx/SDK/2018.2/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include/c++/7.2.1/backward -ID:/Xilinx/SDK/2018.2/gnu/aarch32/nt/gcc-arm-linux-gnueabi/lib/gcc/arm-linux-gnueabihf/7.2.1/include -ID:/Xilinx/SDK/2018.2/gnu/aarch32/nt/gcc-arm-linux-gnueabi/lib/gcc/arm-linux-gnueabihf/7.2.1/include-fixed -ID:/Xilinx/SDK/2018.2/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include -ID:/Xilinx/SDK/2018.2/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/libc/usr/include -std=c++11 D:/Xilinx_Workspace/lab1/src/madd.cpp -o D:/Xilinx_Workspace/lab1/Release/_sds/vhls/madd_pp.cpp 

D:\Xilinx_Workspace\lab1\Release>exit /b 0 
INFO: [PragmaGen 83-3231] Successfully generated tcl script: D:/Xilinx_Workspace/lab1/Release/_sds/vhls/madd.tcl
Moving function madd to Programmable Logic
sds++ log file saved as D:/Xilinx_Workspace/lab1/Release/_sds/reports/sds_madd.log

'Finished building: ../src/madd.cpp'
' '
'Building file: ../src/main.cpp'
'Invoking: SDS++ Compiler'
sds++ -Wall -O3 -I"../src" -c -fmessage-length=0 -MT"src/main.o" -MMD -MP -MF"src/main.d" -MT"src/main.o" -o "src/main.o" "../src/main.cpp" -sds-hw mmult mmult.cpp  -clkid 0 -sds-end -sds-hw madd madd.cpp  -clkid 0 -sds-end -sds-sys-config linux -sds-proc linux -sds-pf "D:\Xilinx_Workspace\SDSoC-Zybo-Z7-20-v2017.4-1\zybo_z7_20"
Create data motion intermediate representation

D:\Xilinx_Workspace\lab1\Release>D:\Xilinx\SDx\2018.2\llvm-clang\win64\llvm\bin\clang.exe -I../src -Wall -fmessage-length=0 -MMD -MP -D SDSCC -target arm-linux-gnueabihf -mcpu=cortex-a9 -mfpu=vfpv3 -mfloat-abi=hard -O0 -g -I D:/Xilinx/SDx/2018.2/target/aarch32-linux/include -D HLS_NO_XIL_FPO_LIB -I D:/Xilinx/Vivado/2018.2/include -ID:/Xilinx/SDK/2018.2/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include/c++/7.2.1 -ID:/Xilinx/SDK/2018.2/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include/c++/7.2.1/arm-linux-gnueabihf -ID:/Xilinx/SDK/2018.2/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include/c++/7.2.1/backward -ID:/Xilinx/SDK/2018.2/gnu/aarch32/nt/gcc-arm-linux-gnueabi/lib/gcc/arm-linux-gnueabihf/7.2.1/include -ID:/Xilinx/SDK/2018.2/gnu/aarch32/nt/gcc-arm-linux-gnueabi/lib/gcc/arm-linux-gnueabihf/7.2.1/include-fixed -ID:/Xilinx/SDK/2018.2/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include -ID:/Xilinx/SDK/2018.2/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/libc/usr/include -std=c++11 -emit-llvm -S D:/Xilinx_Workspace/lab1/src/main.cpp -o D:/Xilinx_Workspace/lab1/Release/_sds/.llvm/src/main.s 

D:\Xilinx_Workspace\lab1\Release>exit /b 0 
Compiling D:/Xilinx_Workspace/lab1/src/main.cpp
sds++ log file saved as D:/Xilinx_Workspace/lab1/Release/_sds/reports/sds_main.log

'Finished building: ../src/main.cpp'
' '
'Building file: ../src/mmult.cpp'
'Invoking: SDS++ Compiler'
sds++ -Wall -O3 -I"../src" -c -fmessage-length=0 -MT"src/mmult.o" -MMD -MP -MF"src/mmult.d" -MT"src/mmult.o" -o "src/mmult.o" "../src/mmult.cpp" -sds-hw mmult mmult.cpp  -clkid 0 -sds-end -sds-hw madd madd.cpp  -clkid 0 -sds-end -sds-sys-config linux -sds-proc linux -sds-pf "D:\Xilinx_Workspace\SDSoC-Zybo-Z7-20-v2017.4-1\zybo_z7_20"
Processing -sds-hw block for mmult
Create data motion intermediate representation

D:\Xilinx_Workspace\lab1\Release>D:\Xilinx\SDx\2018.2\llvm-clang\win64\llvm\bin\clang.exe -I../src -Wall -fmessage-length=0 -MMD -MP -D SDSCC -target arm-linux-gnueabihf -mcpu=cortex-a9 -mfpu=vfpv3 -mfloat-abi=hard -O0 -g -I D:/Xilinx/SDx/2018.2/target/aarch32-linux/include -D HLS_NO_XIL_FPO_LIB -I D:/Xilinx/Vivado/2018.2/include -ID:/Xilinx/SDK/2018.2/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include/c++/7.2.1 -ID:/Xilinx/SDK/2018.2/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include/c++/7.2.1/arm-linux-gnueabihf -ID:/Xilinx/SDK/2018.2/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include/c++/7.2.1/backward -ID:/Xilinx/SDK/2018.2/gnu/aarch32/nt/gcc-arm-linux-gnueabi/lib/gcc/arm-linux-gnueabihf/7.2.1/include -ID:/Xilinx/SDK/2018.2/gnu/aarch32/nt/gcc-arm-linux-gnueabi/lib/gcc/arm-linux-gnueabihf/7.2.1/include-fixed -ID:/Xilinx/SDK/2018.2/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include -ID:/Xilinx/SDK/2018.2/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/libc/usr/include -std=c++11 -emit-llvm -S D:/Xilinx_Workspace/lab1/src/mmult.cpp -o D:/Xilinx_Workspace/lab1/Release/_sds/.llvm/src/mmult.s 

D:\Xilinx_Workspace\lab1\Release>exit /b 0 
Performing accelerator source linting for mmult
Performing pragma generation

D:\Xilinx_Workspace\lab1\Release>D:\Xilinx\SDx\2018.2\llvm-clang\win64\llvm\bin\clang.exe -E -ID:/Xilinx_Workspace/lab1/src -Wall -fmessage-length=0 -MMD -MP -D SDSCC -m32 -D HLS_NO_XIL_FPO_LIB -I D:/Xilinx/SDx/2018.2/target/aarch32-linux/include -ID:/Xilinx_Workspace/lab1/src -D SDSVHLS -target arm-linux-gnueabihf -mcpu=cortex-a9 -mfpu=vfpv3 -mfloat-abi=hard -O0 -g -w -I D:/Xilinx/SDx/2018.2/target/aarch32-linux/include -D HLS_NO_XIL_FPO_LIB -I D:/Xilinx/Vivado/2018.2/include -ID:/Xilinx/SDK/2018.2/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include/c++/7.2.1 -ID:/Xilinx/SDK/2018.2/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include/c++/7.2.1/arm-linux-gnueabihf -ID:/Xilinx/SDK/2018.2/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include/c++/7.2.1/backward -ID:/Xilinx/SDK/2018.2/gnu/aarch32/nt/gcc-arm-linux-gnueabi/lib/gcc/arm-linux-gnueabihf/7.2.1/include -ID:/Xilinx/SDK/2018.2/gnu/aarch32/nt/gcc-arm-linux-gnueabi/lib/gcc/arm-linux-gnueabihf/7.2.1/include-fixed -ID:/Xilinx/SDK/2018.2/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/include -ID:/Xilinx/SDK/2018.2/gnu/aarch32/nt/gcc-arm-linux-gnueabi/arm-linux-gnueabihf/libc/usr/include -std=c++11 D:/Xilinx_Workspace/lab1/src/mmult.cpp -o D:/Xilinx_Workspace/lab1/Release/_sds/vhls/mmult_pp.cpp 

D:\Xilinx_Workspace\lab1\Release>exit /b 0 
INFO: [PragmaGen 83-3231] Successfully generated tcl script: D:/Xilinx_Workspace/lab1/Release/_sds/vhls/mmult.tcl
Moving function mmult to Programmable Logic
sds++ log file saved as D:/Xilinx_Workspace/lab1/Release/_sds/reports/sds_mmult.log

'Finished building: ../src/mmult.cpp'
' '
'Building target: lab1.elf'
'Invoking: SDS++ Linker'
sds++ --remote_ip_cache D:/Xilinx_Workspace/ip_cache -o "lab1.elf"  ./src/madd.o ./src/main.o ./src/mmult.o    -dmclkid 0  -sds-sys-config linux -sds-proc linux -sds-pf "D:\Xilinx_Workspace\SDSoC-Zybo-Z7-20-v2017.4-1\zybo_z7_20"
Analyzing object files
... D:/Xilinx_Workspace/lab1/Release/src/madd.o
... D:/Xilinx_Workspace/lab1/Release/src/main.o
... D:/Xilinx_Workspace/lab1/Release/src/mmult.o
Generating data motion network

D:\Xilinx_Workspace\lab1\Release>D:\Xilinx\SDx\2018.2\llvm-clang\win64\llvm\bin\llvm-link.exe -o D:/Xilinx_Workspace/lab1/Release/_sds/.llvm/sds_all.o D:/Xilinx_Workspace/lab1/Release/_sds/.llvm/./src/madd.s D:/Xilinx_Workspace/lab1/Release/_sds/.llvm/./src/main.s D:/Xilinx_Workspace/lab1/Release/_sds/.llvm/./src/mmult.s 

D:\Xilinx_Workspace\lab1\Release>exit /b 0 

D:\Xilinx_Workspace\lab1\Release\_sds\.llvm>opt -disable-output -mem2reg -basicaa -XidanePass --platform zybo_z7_20 --dmclkid 0 --repo D:/Xilinx_Workspace/lab1/Release/_sds/.cdb/xd_ip_db.xml --dmdb D:/Xilinx/SDx/2018.2/data/DM.db -os linux -processor cortex-a9 -partition 0  0<sds_all.o 
INFO: [DMAnalysis 83-4494] Analyzing hardware accelerators...
INFO: [DMAnalysis 83-4497] Analyzing callers to hardware accelerators...
INFO: [DMAnalysis 83-4444] Scheduling data transfer graph for partition 0
INFO: [DMAnalysis 83-4446] Creating data motion network hardware for partition 0
INFO: [DMAnalysis 83-4448] Creating software stub functions for partition 0
INFO: [DMAnalysis 83-4450] Generating data motion network report for partition 0
INFO: [DMAnalysis 83-4454] Rewriting caller code
Creating block diagram (BD)
Creating top.bd.tcl
Rewrite caller functions
Compile caller rewrite file D:/Xilinx_Workspace/lab1/Release/_sds/swstubs/main.cpp
Prepare hardware access API functions
Create accelerator stub functions
Compile hardware access API functions
Compile accelerator stub functions
Preliminary link application ELF
Enable generation of hardware programming files
Enable generation of boot files
Calling VPL

****** vpl v2018.2 (64-bit)
  **** SW Build 2258646 on Thu Jun 14 20:03:12 MDT 2018
    ** Copyright 1986-2018 Xilinx, Inc. All Rights Reserved.
    Attempting to get a license: ap_opencl
Feature available: ap_opencl
INFO: [VPL 60-895]   Target platform: D:/Xilinx_Workspace/SDSoC-Zybo-Z7-20-v2017.4-1/zybo_z7_20\zybo_z7_20.xpfm
INFO: [VPL 60-423]   Target device: zybo_z7_20
INFO: [VPL 60-1032] Extracting DSA to D:/Xilinx_Workspace/lab1/Release/_sds/p0/vivado/.local/dsa
INFO: [VPL 60-251]   Hardware accelerator integration...

 

Edited by Amin

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4 answers to this question

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Hi @Amin,

Welcome to the forums. I have not work with SDSoC enough to be able to speak on this topic . I have reached out to see if any of my co-workers will have additional input for this thread. We do have a SDSoC platform made in 2017.4 for the Zybo Z7-20 here. I did find a xilinx forum thread here that might be useful to this issue.

thank you,

Jon

.

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Hi @Amin,

You are trying to use a SDSoC Platform designed for SDx 2017.4 in SDx 2018.2. There could be incompatibilities between different versions. Try to switch to SDx 2017.4. Digilent did not release a SDSoC platform for SDx 2018.2 yet. Regarding the building time, it could take between 30 min and 3 hours (from my experience). It depends on your system configuration (OS, CPU, RAM, HDD) and project complexity.

Best regards,

Bogdan

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On 11/19/2018 at 12:56 PM, jpeyron said:

Hi @Amin,

Welcome to the forums. I have not work with SDSoC enough to be able to speak on this topic . I have reached out to see if any of my co-workers will have additional input for this thread. We do have a SDSoC platform made in 2017.4 for the Zybo Z7-20 here. I did find a xilinx forum thread here that might be useful to this issue.

thank you,

Jon

.

Thanks for the thread. So I think it is a common problem for building release configuration! I am sticking to debug building for the moment, and I may try release building later.

Edited by Amin

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On 11/20/2018 at 4:21 AM, bogdan.deac said:

Hi @Amin,

You are trying to use a SDSoC Platform designed for SDx 2017.4 in SDx 2018.2. There could be incompatibilities between different versions. Try to switch to SDx 2017.4. Digilent did not release a SDSoC platform for SDx 2018.2 yet. Regarding the building time, it could take between 30 min and 3 hours (from my experience). It depends on your system configuration (OS, CPU, RAM, HDD) and project complexity.

Best regards,

Bogdan

Thanks for your answer, I think I can not use my license two times for installing the software, but I will try to find another computer to try that on.

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