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Genesys2 Display Port


MateoConLechuga

Question

The display port on the genesys2 board does not seem to be functioning. I have created a design in 2018.2 utilizing the Display Port TX subsystem in tandem with the Video PHY Controller, and when running the debugging example I can verify the main link is established and up, and it passes the training stage, however no image appears on the monitor, and it then powers down after a few seconds. Is there anyone out there that has a working display port example for the genesys2? There doesn't seem to be any working examples as far as I can tell. Any assistance would be much appreciated.

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Hi @MateoConLechuga,

Here is the user_demo which has our only working project for the display port. The project is done in  Vivado 2015.4 and should be used in Vivado/SDK 2015.4. When running the project do not upgrade the ip cores. It appears that the more current display port ip core requires  a TI DP159 retimer which is not part of the Geneysy 2 as discussed in this forum thread here.

thank you,

Jon

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Hello @jpeyron,

I just built and tested the design, and no luck. The display port links and configures properly as usual, however there is no output on the monitor. It works fine for the hdmi and vga ports. This isn't making much sense to me; I've tried with many different monitors and ensured that they were all 1.2 compatible...

 

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The out-of-box demo in the flash memory drives the DisplayPort out and you should see it working.

The source files for the project are here, where Jon linked to. The issue with the DP IP in the demo was that it requires a license to generate a bitstream, so it was removed and re-published here.

I am glad you made it work, I know the feeling of satisfaction when that happens. I am eager to find out what was actually wrong with what you were trying.

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@elodg: The DisplayPort out *does not work* in the out of box demo. I know because I have recompiled the source and used the releases as well from every location I could find before asking this question. It even says in the source documentation for the project you linked that "All features other than Displayport transmit functional". There's another post exactly like this one from last year: 

 

 

 

Regardless, as promised here are the source files for multi-streaming to 4 different displays via vdma from ram. mst-genesys2-src.zip is just the raw source files, they can be built by (Vivado 2016.1):

    cd build

    vivado -source ../scripts/project_create.tcl

The software can then be imported into the SDK by File > Import > Existing Projects into Workspace, under src/sw.

mst-genesys2.zip already has the completed project and SDK set up in /build as needed and is ready to go.

I left the example pattern generators for generation of clocks and other items for ease of use.

 

Downloads:

https://www.filehosting.org/file/details/766618/mst-genesys2-src.zip

 

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