ethernet Ethernet PHY Test Tool

[zygot]

This is more of a tool than a project though I do hope that it inspires projects.

In the course of developing some complex Ethernet projects involving boards from various vendors I had to develop a test tool to make development easier. I'm releasing a simpler version of that tool to help you develop your own Ethernet applications. You will also find it to be a handy tool for learning about using the Ethernet PHY on your FPGA board without the normal MAC/processor encumbrances.

This submission has nothing to do with standard Ethernet or processor based Ethernet applications.

The only downside for Version 1 is that you need a Digilent ATLYS board to serve as the test platform.

[Edited] Not 4 hours have passed and I found a silly bug that mis-reported packet size. I've replaced the archive. I also forgot to add the teaser:

Wed Oct 17 16:13:03 2018
test_interval_reg =  0x000000000100
>>> Starting test

Payload Size =  65536
Total Number of TEST Packets sent =  60000
Total Number of TEST Packets received =  60000
Total Number of TEST Bytes sent =  3932160000
Total Number of TEST Bytes received =  3932160000
Total Number of Errors =  0
Total Number of PHY rxerr Events =  0
Total Duration of the test (in Seconds) =  31.585437952
Percentage Errors =  0.0
TEST packets sent per second =  1899.60956347
Tx Data Rate (Bytes/s) =  124492812.352
Rx Data Rate (Bytes/s) =  124492812.352

ETHERNET_PHY_TESTER_Release_V1A.zip

[zygot]

I've recently added two more boards to the list of DUTs that this tester works with.

When Intel announced the Cyclone 10 family and I realized that instead of making the Cyclone family a better product it was an opportunity to further fracture Cyclone devices into more low end and less useful products and push customers into paid tool subscriptions (Cyclone 10 GX)  I lost interest. I did recently get the Cyclone 10LP development board for a project ( there's not much out there to choose from so I must not have been the only one to lose interest ). The part is a really small device with minimal resources but the board has an 8 MB HyperRam, a 1G Ethernet interface and reasonable IO for $99.  Hmmm.... this board would make a nice optical sensor video server using one of Terasics' add-on boards.

I've had the MAX10 Development Kit for about 2 years now and spent quite some time trying to implement the Ethernet interface ( it has 2 1G ports! ). MAX used to be a PLD but these days looks more like a Cyclone without full IO support. I put the board on the shelf but decided to give it another whirl having ported an Ethernet PHY DUT so easily for the Cyclone 10LP board. This time things went smoothly though Quartus is doing some magic that isn't obvious to anyone trying to do the same thing from scratch for the device. The device on this board is quite large, there 2 1G Ethernet ports, an HSMC connector and  DDR3 external memories. The price is about 2x the $100 I associate with cheap usable FPGA development platforms but it is quite capable. There are a number of options here for anyone wanting to do something with 2 100+ MHZ ADC/DAC channels on a tight budget.

It would for sure be nice if I could find an equivalent Xilinx Series7 board for either of these.