Pleas forgive the stupid question. I have only a few days experience with FPGAs and the Basys 3 board. I am just a hobbyist, not any kind of hardware engineer.
I wrote some simple VHDL Code that just implements an AND and an OR gate that reads switch 0 & 1 as inputs with the result of the AND driving LED0 and the OR driving LED1.
I wrote this code just to get an idea of the Vivado workflow. My code works just as expected.
When I load this code onto the board and run it all of the seven segment LED are dimly lit. They are not used in this project and are commented out in the constraints file.
Do I need to explicitly drive them to logic "0" when not in use? None of the other LEDs on the board are behaving like this.
Question
TwoWeims
Pleas forgive the stupid question. I have only a few days experience with FPGAs and the Basys 3 board. I am just a hobbyist, not any kind of hardware engineer.
I wrote some simple VHDL Code that just implements an AND and an OR gate that reads switch 0 & 1 as inputs with the result of the AND driving LED0 and the OR driving LED1.
I wrote this code just to get an idea of the Vivado workflow. My code works just as expected.
When I load this code onto the board and run it all of the seven segment LED are dimly lit. They are not used in this project and are commented out in the constraints file.
Do I need to explicitly drive them to logic "0" when not in use? None of the other LEDs on the board are behaving like this.
Any help / pointers would be appreciated.
Thanks!
Link to comment
Share on other sites
4 answers to this question
Recommended Posts
Archived
This topic is now archived and is closed to further replies.