sai Posted March 2, 2016 Share Posted March 2, 2016 Hello, I am trying to finish a project typically a USB to SPI convertor. i have written the code and simulated using modelsim (the code is just converting from usb to spi). The code does not contain enumeration process or any thing. My professor want me to do the hardware implementation using the Baysis3 board. In plain words, he want me to write my code to baysis board, send some data from PC to baysis3 board. It has to convert the received data into SPI protocols. Is there any scope for that. Link to comment Share on other sites More sharing options...
mwingerson Posted March 14, 2016 Share Posted March 14, 2016 Hello Sai, If you want to verify the states and values inside the FPGA then you are asking about is ChipScope which is fairly expensive if you don't have a license. Plus you should be able to get most of the same output by printing through a serial port. Personally, I find ChipScope cumbersome, so I would suggest setting up a serial debugging solution. If you want to see the values outside of the FPGA then you can pin them to a Pmod header and use a logic analyzer to look at the data being sent over SPI. I usually use the Analog Discovery or the Electronics explorer board for a login analyzer. In case this is unclear, you want to add a bus-to-uart core to your design and send the UART data out of a pmod header. Then with another device, capture the UART data and collect it on a PC. That data will be a log of what is happening on the bus that the bus-to-uart core is attached to. Since you are using the USB plug to interface with the FPGA then I would connect a UART-to-USB converter. There are a ton of options: PmodRS232, another FPGA, an Arduino/ChipKIT or another serial to USB converter. A good core for the bus-to-uart can be found here: https://raw.githubusercontent.com/Digilent/Nexys4DDR/master/Projects/GPIO/src/hdl/UART_TX_CTRL.vhd Best of luck, Marshall Link to comment Share on other sites More sharing options...
JColvin Posted March 14, 2016 Share Posted March 14, 2016 I'm definitely interjecting a random thought here, but would the Vivado's Virtual I/O IP block that hamster talks about here be a viable replacement for ChipScope? From my limited experience it sounds like it does something very similar... Link to comment Share on other sites More sharing options...
AndrewHolzer Posted March 15, 2016 Share Posted March 15, 2016 It's good that you brought that up, JColvin. I've had some experience with the VIO core and I believe that it along with the ILA core could provide suitable in-fabric scoping. These two cores together provide powerful debugging tools for your design. I will say that I've only worked with the two cores and not ChipScope, so my views are more than definitely biased from my experience, but I'd highly suggest that anybody interested in internal signal analysis look at how to use the cores. Andrew Link to comment Share on other sites More sharing options...
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