understand and configuration of xadc

[HelplessGuy]

Hello everyone,

I worked a lot with the XADC-Wiz IP the last days. But I am not so sure how to configurate the IP-core.

How is the DCLK, the conversation rate and the clock divisor working together.

 

Do I have to configurate the IP core in Vivado Block design AND/OR in SDK?

[jpeyron]

Hi @HelplessGuy,

The XADC Wizard v3.0 LogiCORE IP Product Guide is a good reference for  using the XADC wizard. 

The guide states:

"that the clock to XADC primitive is DCLK. When AXI4-Lite is selected as the Bus interface, dclk is connected to the s_axi_aclk clock. Hence the adcclk division factor must be programmed taking into consideration the s_axi_aclk frequency.

The ADCCLK clock, should be in the range of 4–26 MHz. To support this lower frequency clock the XADC has an internal clock divider. The Vivado IDE allows an external DCLK frequency and required ADC conversion rate (maximum 1 Msps) to be specified. Based on the value of DCLK clock, the wizard then calculates the appropriate clock divider value based on the values of DCLK clock and ADC conversion.

Depending on configuration, ADC clock is internally divided by the XADC primitive to achieve the desired sampling rate."

I typically configure the XADC wizard in the block design. You can change the configuration in SDK using the SYSMON library. I have attached  XADC SDK code for the ZYBO below.

thank you,

Jon 

 

 

 

zybo_xadc_test.c

[xc6lx45]

1 hour ago, HelplessGuy said:

Do I have to configurate the IP core in Vivado Block design AND/OR in SDK?

Maybe one additional comment: The XADC appears as a register space on the bus. In Vivado you set the initial values that are valid until overwritten through the bus.

If your software configures the XADC anyway, the initial values don't matter.

 

[HelplessGuy]

In my eyes your comment @xc6lx45 is not correct.

I choose in Vivado in the XADC IP event mode. And if I do not initial this in the xsysmon too (plus the ADCCLK devider), no sampling will start. So somehow I need both.

@jpeyron: I am using XSYSMON, but if I choose the Event-mode, I do not get any raw values. Maybe you can see my error?

#define SYSMON_DEVICE_ID	XPAR_SYSMON_0_DEVICE_ID
#define DEVIDER 200

static 	XSysMon SysMon_Inst;

u16 vaux6_raw[SAMPLES], vaux14_raw[SAMPLES];


	XSysMon_Config *ConfigPtr;
	int status;

	/*
	 *  INITZIALITATION: XADC (SYSMON)
	 */
	ConfigPtr = XSysMon_LookupConfig(SYSMON_DEVICE_ID);
	if (ConfigPtr == NULL)
	{
		return XST_FAILURE;
	}
	XSysMon_CfgInitialize(&SysMon_Inst, ConfigPtr, ConfigPtr->BaseAddress);

	// XADC Test
	status = XSysMon_SelfTest(&SysMon_Inst);
	if (status == XST_FAILURE)
	{
		return XST_FAILURE;
	}


	/*
	 *  CONFIGURATION: XADC (SYSMON)
	 */
	XSysMon_SetSequencerMode(&SysMon_Inst, XSM_SEQ_MODE_SAFE);		//Default Safe Mode for Configuration
	XSysMon_SetAdcClkDivisor(&SysMon_Inst, DEVIDER);
	XSysMon_SetSequencerEvent(&SysMon_Inst, TRUE);					//Set Event-mode
	XSysMon_SetSeqChEnables(&SysMon_Inst, 0xFF0000);				//Set all AUX-Channels
	XSysMon_SetAvg(&SysMon_Inst, XSM_AVG_0_SAMPLES);				//0 Samples for Average
	XSysMon_SetAlarmEnables(&SysMon_Inst, 0);						//Enable alarms
	XSysMon_SetSequencerMode(&SysMon_Inst, XSM_SEQ_MODE_SIMUL);	//Simultaneous Mode

	// start Conversation
	XSysMon_WriteReg((&SysMon_Inst)->Config.BaseAddress, 0x0C, 0x1);
	usleep(10);
	XSysMon_WriteReg((&SysMon_Inst)->Config.BaseAddress, 0x0C, 0x0);
	sleep(1);

	//read raw
	vaux6_raw[i] = XSysMon_GetAdcData(&SysMon_Inst, (XSM_CH_AUX_MIN+6)); 

 

[xc6lx45]

Well, with "software" I meant the libraries and everything on the controlling side of the bus.
So if that "software" doesn't configure the XADC mode etc, of course it'll rely on the initial value. But I guess most engineers would be reluctant to rely on initial values without good reason (such as "why not? Don't you see it works!")

My point was, the functionality to set initial values and to configure from software is redundant, in a general sense. Neither one will achieve anything the other cannot do, except maybe operation from clock cycle #1 for initial values.

 

[HelplessGuy]

@xc6lx45 yeah, but it seems as if without overwriting the initial values nothing will start in some point.

[xc6lx45]

If that helps, I don't think the XADC has write-sensitive registers (at least not seen as a "black box"). It's unlikely to "trigger" anything.
I've used the XADC with initial values only and it worked as expected. But it's a fairly complex subsystem, several things can go wrong.

[HelplessGuy]

Hi @xc6lx45

In my case, without the XSysMon_SetAdcClkDivisor() function, no event-triggered sampling is possible.

Do you know, why I can not read any converted voltages in event-mode? Do I have to pay on something special attention? (code above)