How to transform this design into KC705 using a Microblaze?

[daryon]

Hi,

 

FYI : I am using Vivado 2017.3 targeting a KC705 board including a Kintex-7 (xc7k325t) FPGA.

 

I am trying to read data from DDR3 and load it to a FIFO and then send the read data for JESD204 to be read out by DAC.

 

Within my search, I found that Xilinx has provided a design strategy here, that implements an AXI DMA and FIFO on a Zynq device which has a PS and PL part.

 

I am trying to transform this design to be compatible with KC705 board and replace the Zynq Processing System with Microblaze. I cannot get a functional design. Can anybody help me to solve this issue?

 

Here is the design schematic provided by Xilinx:

 

Thanks and Regards,

Daryon

[jpeyron]

Hi @daryon,

I have not worked with the KC705 board. We do  have a demo for the genesis 2 ( XC7K325T-2FFG900C) here that uses microblaze, DDR3 and the DMA that might be helpful.

thank you,

Jon