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Mailbox is not working consistently with dual core applications


Mahdi

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Hello,

I am working on a dual core project with mailbox IP on a Arty Z7-10 board which has been acting inconsistently. In my project, 1st core is receiving data from FPGA and sending it through mailbox to the 2nd core; the 2nd core is supposed to receive and  write them to the SD card. I need to write the data at 0.5 to 1 MB/s speed, so I can not read and write fast enough on one core.

As an example to show the problem, I am writing a number to the card that is being incremented by one on a loop, and plot that versus the clock cycles. Supposedly, my output should look like a straight line which it does if I do all of this on one core.

DataCountvsTime_good.thumb.png.cf2ef2b6ab15e84e4fe542d7860a8703.png

 

Now, If I use the mailbox to send the same value between two cores, and write it on the 2nd core, I am seeing gaps and overlaps in my data which I am pretty sure is because of Mailbox. Here are two examples of what is happening.

 

DataCountvsTime_bad.thumb.png.dd3a2245d22c9c57a80d65fc7a2b142d.png

 

If you zoom into the time = 1.0, you can see the following gaps, and overlaps.

 

DataCountvsTime_bad_zoom.thumb.png.6b3e7935685b3e8700032f0ad1cef6b2.png

 

I have set the size of mailbox at 2048, and made sure that it never fills up by checking its status on every loop. So I wonder what could be the reason for these gaps and overlaps? Can't Mailbox IP transfer data consistently between two cores? Is there any other method for doing such jobs?

 

Thanks,

Mahdi

 

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Hi @Mahdi,

I have not worked with the Mailbox IP Core. Doing a quick web search doesn't show any similar issues. Looking at the Mailbox v2.1 LogiCORE IP Product Guide on page 13 it discusses writing and reading while the flags are not in the right state would result in a error. Could you attach a screen shot of you block design and sdk code?

thank you,

Jon 

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Mahdi,

The idea of using mailbox is interesting but I am not sure that it is helping you to speed up data processing. It definitely adds extra overhead latencies which you wanted to reduce.

In similar situations I conducted measurements of latencies using  XScuTimer Timer;        /* Cortex A9 SCU Private Timer Instance */

Xilinx provides examples of its utilization with Vivado. Obtaining accurate profiling information will make clear where is your bottleneck.

Using it with Zybo board I've found that writing to micro SD card can be done at speeds over 10 MB/s, 32-bit RAM operations with AXI at about 30 MB/s. It should be noted that writing to SD card is faster in blocks of 32kB and SD card should be formatted with 32kB sectors aligned.

Good luck!

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