PMODI2S - No sound output!

[BitsAndBugs]

I trying to use the PmodI2S for the first time, but am unable to get sound from the port.

I read thru the post "Pmodi2s Stereo Output Pmod - How Can I Get This Thing To Work?", but unfortunately it didn't solve my issue.

I'm sending I2S audio to the pmodI2S module with a PIC32. The PIC32 is toggling the MCLK pin at 8.3 MHz (I've also tried 11 MHz). Here are the frequencies on the pins, verified with a scope:

- MCLK (pin 1): 8.3 MHz (Supplied by PIC32)

- LRCK (pin 2): ~31.45 kHz (2x channels)

- SCK (pin 3): 2 MHz (I've tried it with the PIC32 supplying this and without supplying it, i.e. internal. When relying on internal, it outputs nothing.)

- SDIN (pin 4): 16-bit data, 32-bits per channel (2x channels) = 64-bit frames

- GND (pin 5): GND

- VCC (pin 6): 3.3v

I'm using Apple headphones that came with my phone to connect to the output jack.

Been fighting this one for many several hours. Any help will the greatly appreciated.

Thanks

 

[hamster]

Duty cycle isn't that important (it has to be between 45% and 55%) , but it has to be perfect integer ratio between MCLK and the other signals.

You might be able to run the PMOD with internal clocking mode - SCLK isn't actively driven, just tie it high. That might allow you to use a perfect integer MCLK. Have a look at 4.2.2 in the datasheet.

If you don't make any headway, I could try configuring my design for an internal serial clock.

[JColvin]

Hi BitsAndBugs,

I personally haven't gotten the PmodI2S to work for me, so the only thing I could recommend is maybe tightening up the clock speeds to match some of the ratios presented in the Cirrus Logic datasheet (pg 12) to see if that helps, but as you saw in the other post, this should not be requirement. I'll ask some of our applications engineers to see if they have any other recommendations.

Thanks,
JColvin

[BitsAndBugs]

Hi JColvin. Thanks for responding.

Yeah any help will be appreciated. Getting I2S data to a speaker has been a challenge for me. I was excited about this module, but am definitely needing some help. I read thru the CS4344 datasheet and still not seeing anything that I'm not already supplying to it. It mentioned about 5v and 3.3v supply. I'm using 3.3v because the PMOD datasheet recommended it.

 

[hamster]

I have sound out of my PMOD I2S, but on an FPGA. Is there anything I can give you to help you with your design (scope traces, timing info...)? What tools to you have at hand to help debug?

If you are really stuck, a $10 logic analyser (e.g. http://www.dx.com/p/logic-analyzer-w-dupont-lines-and-usb-cable-for-scm-black-148945 ) will solve this for you. But if you can at all afford it, get yourself a true Saleae from https://www.saleae.com/ - they rock.

Mike

[BitsAndBugs]

Hi Hamster,

I have an oscilloscope 2 channel 100MHz. I'm able to see what's going into the pmod. I checked out your suggested Saleae and I do like the multi-16 channel one! I'll add this to my wish list.

I don't have a FPGA, but unless I'm mistaken I should still be able to using PIC32 to do the same thing. I'm successfully communicating with another I2S device. But just for kicks, what FPGA are you using?

Also, yes I would greatly appreciate scope traces and timing info.

How sensitive is the master clock frequency of the PMOD?

Thank you!

[hamster]

I'll get you a trace tonight if I can.

The master clock isn't too important. It can be anything from 0.5 MHz to 50 MHz, but of course most of these will not give "industry standard" sample rates. I've been using it on a few different boards, including the Basys3.

Also, be careful to check your pin assignments. For a while the schematic and PMOD reference manual didn't agree on pin ordering (the schematic was correct).

All of the signals must be an integer ratio of mclk - i.e. you can't have 256.001 mclk ticks per frame. So if you see the phase of the LR or SDIN changing with respect to the MCLK then it won't work.

 

 

 

 

[BitsAndBugs]

I'm using the PIC's PWM to generate the MCLK. But I did notice the duty cycle is not a perfect 50% of the pulse width. Plus, the MCLK might not be an even integer because I'm limited on the exact frequencies. But.... if I'm supplying a 'perfect' SCK, is the MCLK so critical? The PIC's I2S peripheral gives a very good BCLK which I have connected to the SCK of the PMOD.

Thanks for pointing out the past pinout issue. I do have the correct datasheet. I verified it with the CS4344 datasheet also and the PCB traces.

[BitsAndBugs]

So are you currently driving the SCLK? I prefer this way, but not working.

[BitsAndBugs]

After relooking at my MCLK input, I think it is the problem. Due to the available PWM settings of the PIC32, my clock output to MCLK is definitely not an integer division like in the datasheet.

Does anyone know of a good circuit or component to multiple the LRCLK from 32kHz to 8.1920 (x256) or to 12.288 (x384)? I prefer this route (i.e. to just multiple the LRCLK).

Thanks

[BitsAndBugs]

Resolved!

The issue was with the MCLK I supplied not being x256 or x384 for the 32kHz sample rate. Once I got this settled, then I had the sound I was looking for.

Thanks for the help!