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Fpga Program State When Power Cycled?

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I am able to program my Nexys 3 board but it seems like when I power cycle it the program is lost and it goes back to the pre-loaded configuration that says "pass" on the 7 segment display.  I can then load the program again and it works.


What is the expected behavior?  Does the FPGA have to programmed every time it starts?  Is this a jumper setting I need to change to get it to maintain its state after power cycle?




Edited by Josh
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Nearly. J8 controls which of the memories is used at startup, but it doesn't control which one is programmed. To write a bitstream to either of the flash devices on board, switch to the "Memory" tab of Digilent Adept, select "SPI flash" or "BPI flash" as appropriate, and program your .bit file to that device. Once these devices are programmed, the FPGA will boot from them when J8 is set appropriately.


Note that CellularRAM (as well as the "RAM" option under the "Memory" tab) is a red herring! CellularRAM is not used in the FPGA configuration process, and is not the same as the memory used by the FPGA for its active configuration.

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Hi timothyheider,


What it sounds like to me is that you have the program loaded onto the CellularRAM on the Nexys 3 which is volatile meaning it will lose any information that it had stored when the board is turned off (or power cycled). 


What you would need to do if you wanted to keep the program on the board is upload it onto the flash memory onto the Nexys 3, which is non-volatile so it will retain the program stored on there (more or less) indefinitely until you purposefully erase or overwrite it.


Unfortunately, I am unfamiliar with FPGA's, so I cannot offer any guidance on how you would write your program to the flash memory as opposed to the CellularRAM.


Please let me know if you have any more questions.




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