Nexys Video, Error during QSPI program execution ( [Labtools 27-3165] )

[koseki 0]

Hello.
I am a beginner in FPGA.
Also I am poor in English. Sorry.

I am developing with Nexys Video.
Although the design is complete, I am suffering from using QSPI Config and e-FUSE security together.

I tried QSPI Config first. This worked well.
Next I tried e-FUSE security.
I wrote the security key and finished setting the FUSE register,
After that, I could not program the QSPI.
When executing the program, the following error will be displayed and will be aborted.
--------------------------------------------------------------------
[Labtools 27-3165] End of startup status: LOW
--------------------------------------------------------------------
You can not configure from QSPI, but you can configure an encrypted bit / bin file using JTAG.

I replaced the USB cable with reference to the past forum, but there was no effect ....

What does this error mean?
Is there a solution for using QSPI Config and e-FUSE security together?
Please tell me if you need information to solve the problem.

Thank you
koseki.

[JColvin 430]

Hi @koseki,

As @BogdanVanca mentioned previously, those of us here at Digilent haven't used eFUSE before so we don't have a lot of advice on it, so we're not certain which control bit caused the QSPI to not be programmable; I would recommend asking on the Xilinx forums to confirm your suspicion about disabling the reading of the AES key preventing programming via QSPI.

Thanks,
JColvin

[BogdanVanca 45]

Hello @koseki,

I never worked with e-FUSE security, so I may be wrong on this. When you said that you finished to set the FUSE register, you were talking about this one: ""FUSE_SEC" ? If yes, I find out that there is one warning when you try to program bit 1 and 0 of this register: "If this bit is programmed to 1, the device cannot be used unless the AES key is known. Return material authorization (RMA) returns cannot be accepted and the Vivado Indirect SPI/BPI flash programming flow cannot be used if this bit is programmed. You must have external configuration memories programmed BEFORE you blow this fuse if you intend to use Vivado for this programming" You can find more info in here https://www.xilinx.com/support/documentation/application_notes/xapp1267-encryp-efuse-program.pdf page 11. 

Best Regards,

Bogdan Vanca

Edited August 23, 2018 by BogdanVanca

[koseki 0]

Hi @BogdanVanca,

Thank you for your reply. I'm glad.

I am also puzzled for the first time to work with the e - FUSE register.
When register setting of e-FUSE was done, it was not possible to find the register named "FUSE_SEC". I refer to the document (UG908), perhaps "FUSE_SEC" may be a register that can be controlled only by UltraScale or UltraScale + devices?

In setting e-FUSE, the USER bit was left blank.
The values are as follows.
-------------------------------------------------------------------- ----------
[7: 0] FF
[31: 8] FF_FFFF
-------------------------------------------------------------------- ----------
Also, the FUSE_CNTL register is set as follows.
-------------------------------------------------------------------- ----------
CFG_AES_Only 1 (Forces use of AES key stored in device)
AES_Exclusive 1 (Disable partial reconfiguration)
W_EN_B_Key_User 1 (Disables programming of AES key and of USER register)
R_EN_B_Key 1 (Disables reading of AES key)
R_EN_B_User 1 (Disables reading of user code)
-------------------------------------------------------------------- ----------
We set all the above FUSE_CNTL registers from 0 to 1.

Until this e-FUSE setting was done, because programming to QSPI was possible
I may be the cause of this setting being unable to program in QSPI.

(If you disable reading AES key, you can not program to QSPI ...?)

Edited August 24, 2018 by koseki

[koseki 0]

Hi ＠JColvin
Thank you for your reply.

Ok, I understand.
I will question the Xilinx Forum.
thank you everyone.