Problems with Zybo DMA Audio Demo

[Rmpjunior]

Hello,

I'm trying to follow the Zybo DMA Audio Demo but I'm founding some problems. I had already make it work one time, but iIm cannot do it again now. 

Everything goes okay until the import of dma and dma_bsp in the Xilinx SDK software, at this point, more than 40 errors appears in "Problems" tab and all of them is related with the file 'xparameters.h' which is missing.

So I found that the "Re-generate BSP Sources" included the missing file and removed all the errors. Continuing with the tutorial I programmed the FPGA with the bitstream generated by vivado and run the SDK with the option "Run in Hardware", but although the log shows that apparently nothing went wrong, I cannot see anything in the SDK console and neither record/play any audio.

 

Here is the log:

17:33:12 INFO	: Connected to target on host '127.0.0.1' and port '3121'.
17:33:12 INFO	: 'targets -set -filter {jtag_cable_name =~ "Digilent Zybo 210279651214A" && level==0} -index 1' command is executed.
17:33:14 INFO	: FPGA configured successfully with bitstream "C:/Users/Roberto/Documents/IME/PFC/Vivado/Zybo-Z7-10-DMA/proj/DMA.sdk/system_wrapper_hw_platform_0/system_wrapper.bit"
17:33:25 INFO	: Disconnected from the channel tcfchan#3.
17:33:26 INFO	: 'targets -set -filter {jtag_cable_name =~ "Digilent Zybo 210279651214A" && level==0} -index 1' command is executed.
17:33:26 INFO	: 'fpga -state' command is executed.
17:33:26 INFO	: Connected to target on host '127.0.0.1' and port '3121'.
17:33:26 INFO	: Jtag cable 'Digilent Zybo 210279651214A' is selected.
17:33:26 INFO	: 'jtag frequency' command is executed.
17:33:26 INFO	: Sourcing of 'C:/Users/Roberto/Documents/IME/PFC/Vivado/Zybo-Z7-10-DMA/proj/DMA.sdk/system_wrapper_hw_platform_0/ps7_init.tcl' is done.
17:33:27 INFO	: Context for 'APU' is selected.
17:33:31 INFO	: Hardware design information is loaded from 'C:/Users/Roberto/Documents/IME/PFC/Vivado/Zybo-Z7-10-DMA/proj/DMA.sdk/system_wrapper_hw_platform_0/system.hdf'.
17:33:31 INFO	: Context for 'APU' is selected.
17:33:31 INFO	: 'stop' command is executed.
17:33:32 INFO	: 'ps7_init' command is executed.
17:33:32 INFO	: 'ps7_post_config' command is executed.
17:33:32 INFO	: Context for processor 'ps7_cortexa9_0' is selected.
17:33:32 INFO	: Processor reset is completed for 'ps7_cortexa9_0'.
17:33:32 INFO	: Context for processor 'ps7_cortexa9_0' is selected.
17:33:32 INFO	: The application 'C:/Users/Roberto/Documents/IME/PFC/Vivado/Zybo-Z7-10-DMA/proj/DMA.sdk/dma/Debug/dma.elf' is downloaded to processor 'ps7_cortexa9_0'.
17:33:32 INFO	: ----------------XSDB Script----------------
connect -url tcp:127.0.0.1:3121
source C:/Users/Roberto/Documents/IME/PFC/Vivado/Zybo-Z7-10-DMA/proj/DMA.sdk/system_wrapper_hw_platform_0/ps7_init.tcl
targets -set -nocase -filter {name =~"APU*" && jtag_cable_name =~ "Digilent Zybo 210279651214A"} -index 0
loadhw C:/Users/Roberto/Documents/IME/PFC/Vivado/Zybo-Z7-10-DMA/proj/DMA.sdk/system_wrapper_hw_platform_0/system.hdf
targets -set -nocase -filter {name =~"APU*" && jtag_cable_name =~ "Digilent Zybo 210279651214A"} -index 0
stop
ps7_init
ps7_post_config
targets -set -nocase -filter {name =~ "ARM*#0" && jtag_cable_name =~ "Digilent Zybo 210279651214A"} -index 0
rst -processor
targets -set -nocase -filter {name =~ "ARM*#0" && jtag_cable_name =~ "Digilent Zybo 210279651214A"} -index 0
dow C:/Users/Roberto/Documents/IME/PFC/Vivado/Zybo-Z7-10-DMA/proj/DMA.sdk/dma/Debug/dma.elf
----------------End of Script----------------

17:33:32 INFO	: Memory regions updated for context APU
17:33:33 INFO	: Context for processor 'ps7_cortexa9_0' is selected.
17:33:33 INFO	: 'con' command is executed.
17:33:33 INFO	: ----------------XSDB Script (After Launch)----------------
targets -set -nocase -filter {name =~ "ARM*#0" && jtag_cable_name =~ "Digilent Zybo 210279651214A"} -index 0
con
----------------End of Script----------------

17:33:33 INFO	: Launch script is exported to file 'C:\Users\Roberto\Documents\IME\PFC\Vivado\Zybo-Z7-10-DMA\proj\DMA.sdk\.sdk\launch_scripts\xilinx_c-c++_application_(system_debugger)\system_debugger_using_debug_dma.elf_on_local.tcl'

 

Thanks in advance,

[jpeyron]

Hi @Rmpjunior,

Looking at your SDK log it appears like you are using the Zybo-Z7-10 here. DMA project here.  Please use the most recent release of the Zybo DMA project here. 

thank you,

Jon

[jpeyron]

Hi @Rmpjunior,

What Operating System are you using with your PC?  What version of vivado are you using?  If windows please attach a screen shot of the serial communication using tera term, if Linux use  PuTTY. If Linux are you part of the dialout group?

thank you,

Jon

[Rmpjunior]

Hello, thanks for the answer, I'm using Vivado 16.4 in Windows. I was using the SDK terminal, inside the Xilinx SDK, but with Termite I have the same situation.

 

[jpeyron]

Hi @Rmpjunior,

What development board are you using? The Zybo or the Zybo-Z7-10? 

thank you,

Jon

[Rmpjunior]

HI,

I'm using the ZYBO - Zynq 7000 development board. This one: https://store.digilentinc.com/zybo-zynq-7000-arm-fpga-soc-trainer-board/

[Rmpjunior]

Oh, it's true, I didn't realize that ZyboZ7 was another board ?

Now it worked, thank you!

Taking the opportunity, I want to add some IPCores to process the audio input, and I'm planning to do it with the System Generator for MATLAB.

I think that I need to do some type of conversion of the I2S signal to a signal which can be processed in my SysGen block, right? How can I do this conversion? There is any IP in the default repository to do that?

 

Thank you.

[jpeyron]

Hi @Rmpjunior,

Unfortunately, we at digilent do not have experience with MATLAB and System Generator. I would suggest to contact MathWorks support here about this topic.

thank you,

Jon