doubts on uartlite interrupt

[Sridhar Prasath Aruppukottai Ganesan]

Greetings all,

 This might be a basic question about uartlite interrupt. lets assume that, we are going to use the uartlite in interrupt mode.

1. If we scugic interrupt, it will enter into interrupt handler function for each cycle(based on the timeout value).

2. If we use custom interrupt(user defined interrupt) , how will it enter the interrupt handler at the first place? "The interrupt handler should know that this is the reason(interrupt)why i am entering the interrupt handler function" ..right? 

3. where will we define that interrupt? otherwise there is a great chance that it wont enter the interrupt handler function at all..right?

[Sridhar Prasath Aruppukottai Ganesan]

suppose that, if i receive a string "RING" in the receiver buffer of UARTLITE, I have to enter the interrupt handler function. How should I define this interrupt? 

[jpeyron]

Hi @Sridhar Prasath Aruppukottai Ganesan,

I do not have a lot of experience with interrupts but here is a completed uartlite interrupt project done in Vivado 2018.2 for the Zedboard,hopefully this will be a helpful reference for your project. 

thank you,

Jon

[Sridhar Prasath Aruppukottai Ganesan]

Dear @jpeyron i could also get the same ouput for uartlite interrupt example in my sdk. But I couldnt able to understand the code completely.  There are some doubts in that code.

1. What are sendhandlers and recvhandlers?

2.  Could you please just tell in simple words what are we exactly doing in that example? 

Your help is very much needed.

Thank you

[jpeyron]

Hi @Sridhar Prasath Aruppukottai Ganesan,

The Zynq Book here covers interrupts in more detail and has tutorials as well. My understanding of the example is that it generates data to be sent and then received and uses interrupts for both processes. Their code has comments throughout it as well. The example has a handler for both the send and receive process.   I would also suggest to reach out to xilinx support about their interrupt example to get more specific information about it.  Here is a AR# 50572 Zynq-7000 Example Design - Interrupt handling of PL generated interrupt that might be helpful. 

thank you,

Jon