Facing error in the rgb2dvi IP

[dpaul]

Hello all,

I have got hold of the Digilent Zybo Video Workshop, Paris, France, 23.03.2017 PDF. I am following "Task Two" there in, at page 16 - Create a pass-through video pipeline.

I want to implement this using a Z7-10 and using Vivado 2017.4. I will be using 720p resolution video (TMDS input clock < 80MHz).

I have build the BD and is as shown below. This you can find in the PDF at page 26 and is exactly the same.

The design is synth properly but during bitstream generation I get the following error.

[DRC PDRC-34] MMCM_adv_ClkFrequency_div_no_dclk: The computed value 2475.248 MHz (CLKIN1_PERIOD, net CLK) for the VCO operating frequency of the MMCME2_ADV site MMCME2_ADV_X0Y1 (cell hdmi_i/rgb2dvi_0/U0/ClockGenInternal.ClockGenX/GenMMCM.DVI_ClkGenerator) falls outside the operating range of the MMCM VCO frequency for this device (600.000 - 1200.000 MHz). The computed value is (CLKFBOUT_MULT_F * 1000 / (CLKINx_PERIOD * DIVCLK_DIVIDE)). Please run update_timing to update the MMCM settings. If that does not work, adjust either the input period CLKINx_PERIOD (6.059999), multiplication factor CLKFBOUT_MULT_F (15.000000) or the division factor DIVCLK_DIVIDE (1), in order to achieve a VCO frequency within the rated operating range for this device.

To get around, I edited the rgb2dvi_ooc.xdc such that I have commented out the following:

#create_clock -period 6.060 [get_ports PixelClk]
#create_generated_clock -source [get_ports PixelClk] -multiply_by 5 [get_ports SerialClk]

But it didn't help. What more can I do?

Suggestions, advises?

I have attached the top level xdc.

 

 

 

 

 

 

hdmi_vdma.xdc

[jpeyron]

Hi @dpaul,

Here is a forum thread that is for 1080p rather than 720, but I believe it should help in your project.

thank you,

Jon

[dpaul]

Hi @jpeyron,

Thanks for posting the link.

But I am constraining the tmdi input clock at the top level. I tried again and get the same error message.

Note that I had done a similar IP upgrade of the dvi2rgb and rgb2dvi cores as the author of the link mentioned you had done.

# < 80MHz TMDS clock
#create_clock -period 12.5 [get_ports TMDS_rx_i_clk_p]
create_clock -period 13.468 -waveform {0.000 6.734} [get_ports TMDS_rx_i_clk_p]

hdmi_vdma.xdc

[elodg]

The error message complains about the internal frequency of the MMCM in rgb2dvi being too high. There are two things that influence the error message: the input clock frequency, and the parameters of the clock primitive. The input clock frequency is propagated from dvi2rgb and is originally coming from the TMDS_rx_i_clk_p port. The parameters of the clock primitive are exposed in the rgb2dvi IP wizard as the expected resolution/clock frequency.

Your project seems to have the latter set to expect a low resolution/frequency, hence the 15x multiplication factor. However the input clock is timed for the highest DVI frequency possible at 165MHz (6.06ns).

In a synthesized design you can execute the write_xdc command to dump all constraints to a file. Then look for the erroneous clock definition to find where it is coming from.

[varunb]

Hi Paul,

I just encountered the same issue for the same project. Have you found a solution to this yet?

If yes, please guide me.

Thanks,
Varun

[jpeyron]

Hi @varunb,

Here is another thread that discusses the PixelClk. If you havent seen the documentation for the  rgb2dvi  and dvi2rgb please look here and here.  Here is a forum thread about making an HDMI pass through that might be helpful.

thank you,

Jon

[varunb]

Hi @jpeyron

Tried it all so far and nothing worked. Am not sure what wrong am doing here. I rechecked the constraint file and it's fine. Added a new clock for the hdmi_in_clk_p pin, still the same error.

Any other ideas would be great help.

Thanks,
Varun

[kwilber]

I have a basic hdmi_passthru project for both an arty Z7 and a zybo Z7 that I just did while helping someone else last week. Starting with a known working project might let you compare the source files to see the differences.

Are you interested in that? If so what board are you using?

[varunb]

@kwilber Yes, am interested. Am using the zybo7 board too. Please share the source files including the project files.

 

[kwilber]

Here is an archive of the project.

The forum had limits on attachment size so I had to use .7z compression rather than .zip or .gz. Use 7zip to extract the directory and open the .xpr in vivado 2017.4.

hdmi_pass.7z