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TAC

Zybo yocto boots up not at 115200

Question

I was able to successfully build the yocto zybo project and load SD card as described here https://emcongiu.wordpress.com/.

When booting up on zybo I can see the heart-beat led flash correctly, but connecting PC com port to the FTDI uart on zybo, get garbage at 115200 baud,

I scoped the FTDI uart input pin and looks its getting data around 75 kbs, not 115.

I tried modifying the uart config values in ps7_init.c in uboot folder (meta-zybo-master\recipes-bsp\u-boot\u-boot-dglt\zybo-zynq7)  but did not have any effect. 

Is there other code that also initializes the uart baud dividers?

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Hi @TAC,

I have reached out to an experience embedded linux engineer about your thread.  We also have multiple petalinux projects as an alternative to yocto project here.

thank you,

Jon

 

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Any chance you are using the Zybo Z7-10, not the original ZYBO? The input oscillator on that board changed from 50MHz to 33.333MHz, which means if you try to run software made for the original ZYBO on it, I would expect things to run at about 66.66% of the expected speed, which explains your observation.

I'd also expect a lot of other things to not function correctly, which would make me somewhat surprised you got as far as you did.

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Actually its a Z7-20,  Yes makes total sense now, I have been able to create bare metal apps and have them run via ok with xilinx tools, but this was independent of that.  I noticed the UART freq.in ps_init.h is 50000000 . would changing this constant roll up into the rest of the boot/yocto application and set the proper baud divider.  Since modifying in ps7_init.c had no effect, I'm assuming is set later on in the applications.

Thanks

 

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I tried modifying the ps7_init.h to set uart freq to 33333333 from 50000000, rebuilt all the yocto/zybo images and still runs at 75 kbs.

Any other ideas?

 

 

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@TAC

Ahhhhh, I understand a bit more now... you are not using the PL (FPGA) in the Zynq, only the processors. 

I peaked at the meta-zybo layer hosted on github. I think you will need to do at least two things to make it work on any level:

1) Open https://github.com/emcongiu/meta-zybo/blob/master/conf/machine/boards/zybo/zybo-zynq7-board.dtsi and change the following:

ps-clk-frequency = <50000000>;

to:
  
ps-clk-frequency = <33333333>;

and also:

	ps7_ddr_0: memory@0 {
		device_type = "memory";
		reg = <0x0 0x20000000>;
	} ;
          
to:
          
   	ps7_ddr_0: memory@0 {
		device_type = "memory";
		reg = <0x0 0x40000000>;
	} ;

2) Replace ps7_init.c and ps7_init.h with those found here: https://github.com/Digilent/Petalinux-Zybo-Z7-20/tree/master/Zybo-Z7-20/project-spec/hw-description  

I'm still not going to guarantee that this will work, but it might. If you can manage to get a terminal, ethernet and USB might not be working because I think some things may need to change in the device tree for those devices too. For an example of what the ethernet and USB modifications in the device tree dtsi should look like, you can refer here: https://github.com/Digilent/Petalinux-Zybo-Z7-20/blob/master/Zybo-Z7-20/project-spec/meta-user/recipes-bsp/device-tree/files/system-user.dtsi . Only look at the ethernet and USB stuff, most of the other modifications are for devices that are expected to be in the FPGA. 

...

Also you could just follow this Digilent provided guide and use petalinux :) https://github.com/Digilent/Petalinux-Zybo-Z7-20

 

Edited by sbobrowicz
Accidentally posted while I was half-finished

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