How to write ucf file for displaying on seven segment on spartan3

[Nikhil Singh]

Hi all,

I am doing a project on vhdl in which i am trying to display a pattern (like forming an eight) on seven segment display on spartan 3 fpga kit.I have written the vhdl code and simulation works correctly,but the problem is i am not able to write the ucf code (written but may be wrong) required for implementation on spartan 3 kit.I would highly greatful if anyone can help me as to how to write ucf code or modify my vhdl code.

Thanks in advance.

Regards,

Nikhil Singh

pattern generator.txt

[D@n]

@Nikhil Singh,

Have you seen this article?

Dan

[Nikhil Singh]

@D@n

in the article they are using some other digilent board while i am using spartan 3.Moreover ucf file is not given.

Nikhil Singh

[zygot]

Hi @Nikhil Singh,

As you know the .ucf format is associated with ISE, not Vivado ( the Spartan 3 family isn't supported by Vivado ). This project has some examples of the .ucf format: https://forum.digilentinc.com/applications/core/interface/file/attachment.php?id=3063

IO_EXPANDER_R3.zip

Note that the location constraints in this project are not likely appropriate for your board, but you can see what the basic syntax is. Use the schematics for your board to determine pin locations.

You can find the complete project source in the Digilent Project Vault project titles "Turn your Nexys Video into a Development Platform". I suggest that you use the Xilinx Documentation Navigator to find documentation on designing with ISE.