Jump to content

Silicon Type of Arty Z7 and Using Secure Boot


Recommended Posts

Hello All,

Forgive me in advance for my lack of FPGA knowledge, I am an intern with mostly software experience. 

So I was looking to purchase the Arty Z7 APSoC Zynq 7000. I found the Xilinx issue AR# 47565 and some other forum posts saying that the type of Silicon may prevent the Zynq from using Secure Boot. The page I linked says that the Status of the problem is active. If you look at this page, the resolution status of the issue is fixed. Perhaps I am misunderstanding that table though.  

So would the Arty Z7 be affected by this issue? My end goal is to encrypt my C code from the SDK when it is read from memory upon booting up. 

Thank you,

Christian 

Link to comment
Share on other sites

I think 47565 applies only to engineering samples (ES), not to production devices.

>> 'na' means the issue does not apply.

Production: na

"CES" is used at least by NXP meaning "customer" engineering samples. Probably the same for Xilinx.

 

Link to comment
Share on other sites

15 hours ago, xc6lx45 said:

I think 47565 applies only to engineering samples (ES), not to production devices.

>> 'na' means the issue does not apply.

Production: na

"CES" is used at least by NXP meaning "customer" engineering samples. Probably the same for Xilinx.

 

Thank you for your reply. So you are saying that the Arty Z7 would probably be "CES" silicon? 

I am not sure I fully understand what production silicon is.  If you can, would you mind explaining that? 

Link to comment
Share on other sites

No, "production" silicon is what is sold through regular channels.

"Engineering samples" are given out to (large) customers before a device goes into production but you wouldn't be able to get them as an end customer (it's a contract question but most likely, the resulting devices would be forbidden to be sold commercially)

Link to comment
Share on other sites

2 minutes ago, xc6lx45 said:

No, "production" silicon is what is sold through regular channels.

"Engineering samples" are given out to (large) customers before a device goes into production but you wouldn't be able to get them as an end customer (it's a contract question but most likely, the resulting devices would be forbidden to be sold commercially)

Got it, thank you for the clarification!

Link to comment
Share on other sites

BTW, the terminology isn't rigidly defined, but usually the time line goes

- engineering samples"ES"

- customer samples "CS"

- volume production

Those are important milestones in a typical ASIC design process.

The ES may be needed for example internally for test "engineering" to bring up the volume test. "C"ES sounds to me like Xilinx is handing out early silicon (therefore "engineering" in the name) to some customers, with a disclaimer that some features are still broken.

Makes perfect sense and it seems highly unlikely that those would ever be sold to us end customers, who are left scratching their heads at said disclaimer...

Link to comment
Share on other sites

Archived

This topic is now archived and is closed to further replies.

×
×
  • Create New...