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malkauns

Basic PL -> PS data stream transfer on Zynq 7000

Question

I am having some trouble understanding how to do a simple data stream transfer from PL to PS.  I have memory mapped in the PS using /dev/mem where I will receive the data.  I am successful at achieving this but only for the first 32 bits of data.  I was hoping that there is some way to keep receiving data consecutively into the data buffer until tlast is issued on the PL side.  Maybe I am not understanding this correctly.

Here is my design:

design.thumb.png.91a617d04f0f1ec12ba057b657696da3.png

Here is my ax_stream_test PL code:

https://pastebin.com/w1ZYbZwa

Here is my PS c code:

https://pastebin.com/rHze2HSz

The PS code is currently just a test project but eventually I will be transferring at least 3 megabytes per second from PL to PS.  If I am using the wrong IP's for this purpose then please suggest an alternative (but not BRAM because my final design is already using the maximum).  Thanks in advance for any help.

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I'd bet this is a caching issue. You should try calling some functions to flush the cache after the DMA transfer completes. You could also try using the ACP port (instead of the HP0) to keep the cache coherent, but I'm not really sure if that requires some additional work in the PL or software.

See here for some info on functions that can be used to flush the cache: http://www.infradead.org/~mchehab/kernel_docs/unsorted/cachetlb.html .

Also, you should probably reserve the range of memory you are using for your buffers in your device tree so that the system doesn't try to use it. See here for example: https://github.com/Digilent/Petalinux-Zybo-Z7-20/blob/49c08bc77ea6da7c85201ab061acee5ae18d87cc/Zybo-Z7-20/project-spec/meta-user/recipes-bsp/device-tree/files/system-user.dtsi

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