Configuration: XADC

[theAsker]

Hello everyone!

I bought the Zybo Z7-20 board, and my aim is to convert 2 analog signals to digital signals via XADC in an simultaneous wy.

For this I want to use the bare-metal programming in bipolar-mode (I am using Vivado IDE & SDK 2017.4).

In the library xadcps.h I found nothing about the configuration to bipolar mode.

 

Can anyone help me, telling which functions I need and how do I have to configurate them? Is there an example existing?

 

Thanks for all help!

[BogdanVanca]

Hello @theAsker,

To accommodate bipolar signals, your analog input must be configured to bipolar mode. Bipolar mode is selected by writing to configuration register 0 from control registers. From what I found, this would be the third register from the 40h to 42h configuration registers (check table 3-4 page.43 from the attached document). I never tried to reconfigure the xadc from SDK, but I'm quite sure that you are not looking into the right header file. Please check this one : xadcps_hw.h. This header file contains identifiers and basic driver functions (or macros) that can be used to access the XADC device through the DeviceConfig Interface of the Zynq. If you go to line 281, you will find this : #define XADCPS_CFR0_DU_MASK 0x0400 /**< Bipolar/Unipolar mode */. Try to work it from here and tell me if you obtain some results. I am looking forward to hearing from you.

 

cheers,

Bogdan Vanca

ug480_7Series_XADC.pdf

[theAsker]

I added now all kind of configurations:

XAdcPs_WriteInternalReg(xadc_ptr, XADCPS_CFR0_OFFSET, 0x8400); //bipolar mode
XAdcPs_WriteInternalReg(xadc_ptr, XADCPS_CFR1_OFFSET, 0x4F0F);
XAdcPs_WriteInternalReg(xadc_ptr, XADCPS_CFR2_OFFSET, 0x0400);

In the first code line, the bipolar should be enabled.

But if I change now the two cables of my input, the raw_values stays the same. Do you know, where my problem is?

 

[xc6lx45]

Hi,

(all references: https://www.xilinx.com/support/documentation/user_guides/ug480_7Series_XADC.pdf)

said bit in CFR0 applies only to single channel mode but you're using sequencer mode, implicitly through simultaneous-sampling mode:

page 46: In the simultaneous sampling mode, the sequencer is used to operate both ADCs in lock stepto sample two external analog inputs and store results in the status registers.

XAdcPs_WriteInternalReg(xadc_ptr, XADCPS_CFR1_OFFSET, 0x4F0F); and 0x4 for SEQ3..SEQ0 simultaneous-sampling according to table 3-9.

For this, you need to flag the correct channels here:

#define XADCPS_SEQ04_OFFSET 0x4C /**< Seq Reg 04 Adc Input Mode Select */
#define XADCPS_SEQ05_OFFSET 0x4D /**< Seq Reg 05 Adc Input Mode Select */

If it still doesn't work, check also your analog common mode voltage, page 32.

I've used them in bipolar mode, they do work :)

 

 

[theAsker]

I don't understand exactly what, I have to change?

Could you help me here.

 

There is for the XADC Wizard block the option to enable bipolar channels. But in the case, I am doing this, also nothing is happening...

analog common mode is not interesting for me, cause I want my voltage +-0.5V arround 0V

[theAsker]

I enabled in the XADC Wizard Block for Vaux6 and Vaux14 (my channels) bipolar. -no configurations now, only initialisation is added in the bare-metal code-

How if I let read the channels i get much smaller values. Raw value is arround 350 now. Before that, the value was arround 1250 (330mV DC is connected). (Update: If I let the two inputs open, I also measure the same)

So I think there is something happening in the conversion. But surly not the right ....

Also if I change the cables + to - and - to + so I should measure -330mV, i get the same raw-value.

Does someone have an idea, why?

[jpeyron]

Hi @theAsker,

Please attach your sdk code so we can better assist you.

thank you,

Jon

[theAsker]

I found the mistake. It is really a mess that it took me arround 6 hours to figure out, that I am reading to the wrong channel.

 

Does someone know if bipolar mode with simultaneous sampling is slower than unipolar mode with simultaneous sampling

[jpeyron]

Hi @theAsker,

I would suggest to look at the 7 Series FPGAs and Zynq-7000 All Programmable SoC XADC Dual 12-Bit 1 MSPS Analog-to-Digital Converter User Guide. Page 30 talk about the 12-bit acquisition time. I did not see anything specific about sampling rate.

thank you,

Jon