Nexys Video HDMI, code not working.

[chasep255]

I am having a real hard time getting the HDMI output on my nexus video to work.  Here is my code.  I am using digilents rgb2dvi IP. Right now all I want is for it do display a white screen.  If anyone has an example of how to do this it would be appreciated.

 

module hdmi_test(input sysclk,
                 output [2:0] TMDSp, TMDSn,
                 output TMDSp_clock, TMDSn_clock,
                 input reset);

    wire pixclk;
    pixclk_gen pxclkg(sysclk, pixclk);       

    wire hsync, vsync, blanking;
    wire [3:0] red, green, blue;
    vga v(.vga_clk(pixclk),
            .hsync(hsync),
            .vsync(vsync),
            .red(red),
            .green(green),
            .blue(blue),
            .blanking(blanking));

//    PORT (
//                 TMDS_Clk_p : OUT STD_LOGIC;
//                 TMDS_Clk_n : OUT STD_LOGIC;
//                 TMDS_Data_p : OUT STD_LOGIC_VECTOR(2 DOWNTO 0);
//                 TMDS_Data_n : OUT STD_LOGIC_VECTOR(2 DOWNTO 0);
//                 aRst : IN STD_LOGIC;
//                 vid_pData : IN STD_LOGIC_VECTOR(23 DOWNTO 0);
//                 vid_pVDE : IN STD_LOGIC;
//                 vid_pHSync : IN STD_LOGIC;
//                 vid_pVSync : IN STD_LOGIC;
//                 PixelClk : IN STD_LOGIC
//               );

    wire [23:0] rgb = {red, 4'b0, green, 4'b0, blue, 4'b0};

    rgb2dvi_0 d(.TMDS_Clk_p(TMDSp_clock),
                 .TMDS_Clk_n(TMDSn_clock),
                 .TMDS_Data_p(TMDSp),
                 .TMDS_Data_n(TMDSn),
                 .aRst(reset),
                 .vid_pData(rgb),
                 .vid_pHSync(hsync),
                 .vid_pVSync(vsync),
                 .PixelClk(pixclk),
                 .vid_pVDE(blanking));

endmodule

module vga(output [3:0] red, green, blue,
           output hsync, vsync, blanking,
           input vga_clk);
           
    
    reg [9:0] hpx = 0, vpx = 0;
    reg [9:0] next_hpx, next_vpx;
    
    assign hsync = !(hpx >= 660 && hpx <= 756);
    assign vsync = !(vpx >= 494 && vpx <= 495);
    assign red = hpx < 640 && vpx < 480 ? 4'b1111 : 0;
    assign blanking = red == 0;
    assign green = red;
    assign blue = red;
    
    
    always @(posedge vga_clk) begin
        hpx <= next_hpx;
        vpx <= next_vpx;
    end
    
    always @* begin
        next_vpx = vpx;
        next_hpx = 0;
        
        if(hpx == 799) begin    
            if(vpx == 524)
                next_vpx = 0;
            else
                next_vpx = vpx + 1;
            
        end else begin
            next_hpx = hpx + 1;
        end
    end
endmodule

 

I get the following error.

[DRC 23-20] Rule violation (AVAL-46) v7v8_mmcm_fvco_rule1 - The current computed target frequency, FVCO, is out of range for cell d/U0/ClockGenInternal.ClockGenX/GenMMCM.DVI_ClkGenerator. The computed FVCO is 251.701 MHz. The valid FVCO range for speed grade -1 is 600MHz to 1200MHz. The cell attribute values used to compute FVCO are CLKFBOUT_MULT_F = 10.000, CLKIN1_PERIOD = 39.72973, and DIVCLK_DIVIDE = 1 (FVCO = 1000 * CLKFBOUT_MULT_F/(CLKIN1_PERIOD * DIVCLK_DIVIDE)).
This violation may be corrected by:
  1. The timer uses timing constraints for clock period or clock frequency that affect CLKIN1 to set cell attribute CLKIN1_PERIOD, over-riding any previous value. This may already be in place and, if so this violation will be resolved once Timing is run.  Otherwise, consider modifying timing constraints to adjust the CLKIN1_PERIOD and bring FVCO into the allowed range.
  2. In the absence of timing constraints that affect CLKIN1, consider modifying the cell CLKIN1_PERIOD to bring FVCO into the allowed range.
  3. If CLKIN1_PERIOD is satisfactory, modify the CLKFBOUT_MULT_F or DIVCLK_DIVIDE cell attributes to bring FVCO into the allowed range.
  4. The MMCM configuration may be dynamically modified by use of DRP which is recognized by an ACTIVE signal on DCLK pin.

 

[Sergiu]

Hello,

Have you looked at the Nexys Video's reference page?

At the link below, you will find a tutorial explaining how to implement the Nexys Video HDMI Demo:

https://reference.digilentinc.com/nexys-video:hdmi

Please follow the instructions from there and see how it goes. There is also another tutorial showing a more general procedure, here, although I would advise following the first one. 

Sergiu

[TommyK]

Hi chasep255,

This is a difficult problem to diagnose, but I think it was brought up in issues on Github here. You might need to remove a -source line in one of the core's .xdc files. Have you had any progress since?