writing data(from UART0) to DDR memory and reading the processed data(to UART1) from DDR

[Sridhar Prasath Aruppukottai Ganesan]

Greetings all,

I am new to zedboard. This might be a basic question. 

1. I want to send some data via UART0 to DDR memory through direct memory access AXI. (GPS data)
2. Again I want to collect another set of data from UART1 and writing it to DDR memory.(GSM/LTE module)

Now if interrupt from one UART( UART1) occurs, I want the processed data of UART0 which is on the DDR memory to be read via UART1(GSM module) and send to a remote server.

Any suggestions and advice on how can i design the hardware?

[jpeyron]

Hi @Sridhar Prasath Aruppukottai Ganesan,

Could you be more specific about where the gps data and gsm/lte data is coming from? Are you going to use the pmod ports to connect to these devices and receive data? How are you planning on sending data to a remote server?

thank you,

Jon

[Sridhar Prasath Aruppukottai Ganesan]

Dear @jpeyron Thank you so much for your response. I would really need your help.

1. I am using GTPA010 Gps module and I am going to connect on pmod connectors(Tx pins and Rx pins on JA2 and JA4 and ground seperately). The Gps module has external power supply. So  think it wont need vcc.

2. For GSM module, the connection is almost same as GPS module(Any other pmod connector among JB,JC,JD and maybe JE on the PS side).

3. One of the tasks is to collect the GPS data and store it in the internal memory of zedboard. I have to collect the GSM data(cellId , base stations etc) as well.

4. Whenever requested , the gps data on the internal memory should be sent to a remote server via GSM.

I donno how to start with hardware design. I m planning to use UART0 and UART1 for both these pmod connections. Please help me with this hardware design

[jpeyron]

Hi @Sridhar Prasath Aruppukottai Ganesan,

UART0 and UART1 are tied to the ps. If you are needing to connect these two modules to pmod ports through uart communication the i would use the axi uartlite or axi uart 16550. I would not use JE since this is tied directly to the ps and would be more difficult to get working.  Is this project going to be baremetal through vivado/sdk or are you going to use embedded linux such as petalinux?

thank you,

Jon

[Sridhar Prasath Aruppukottai Ganesan]

hey @jpeyron this is going to be a baremetal project. I tried using the AXI uartlite for both modules. I tried connecting the AXI UARTLITE port with direct memory access port(S_AXI_S2MM) to access the DDR memory. 

But I think  both UARTLITE and S_AXIS_S2MM configurations are different. So i could not make a connection between these ports.

 I could connect only tx pin of AXI Uartlite  and  s_axis_s2mm_tdata pin of S_AXIS_S2MM Port. And all other pins were left unconnected and the port S_AXIS_S2MM is left unconnected. So I think because of that, it had thrown some error.

And if i want to use AXI UARTLITE for both of them, where do i specify to which pins its been connected to. Do i need to create CREATE INTERFACE PORT for each of the AXI_UARTLITES and specify them in the constraints file ???

Note: Is my way of using AXI Direct memory access to access the DDR memory  is correct(While using AXI UARTLITE blocks)??

[jpeyron]

Hi @Sridhar Prasath Aruppukottai Ganesan,

Can you attach a screen shot of what your block design looks like?  For the uartlite you will need to right click on the uartlte out and select make external and then constraint the pins with the xdc.  Are you using the zynq processor?

thank you,

Jon 

[Sridhar Prasath Aruppukottai Ganesan]

hello @jpeyron I have attached the screenshot. But i m not sure whether it is understandable or not. I will try to explain few points from the design

1. uartlite_0 is for GPS module. only writing to DDR memory is required. so i connected tx pin only to s2mm port.

2. uartlite_1 is for GSM. reading and writing r required. so connected both rx and tx pins.

3. Need two write channels for writing data. Hence I implemented TWO Axi DMA blocks.

4. connected external interface ports to make connection to the pmod connectors.

Please help me with this if my understanding is wrong.

[Sridhar Prasath Aruppukottai Ganesan]

Dear @jpeyron Thanks for your response. I think I have solved this part. I physically created a loopback between tx and rx wires and the example started working. Thank you so much. You are of great help.

[HelplessGuy]

Hi @Sridhar Prasath Aruppukottai Ganesan,

i am very interested in your project. is it possible to get a .zip of it?

greetings,