There is a demo project for setting up Audio Codec on the Nexys Board here. After running the .tcl for project creation there are several problems:
1- The project is not compatible with Vivado 2017.4. I solved its many issues after several tries.
2- There are 6 I2C ports in the MicroBlaze block design for talking to the codec, whereas there should be 2 ports; i.e. SDA & SCL. When implementing design, BitGen fails for having no pin location for 6 I2C pins.
Why such an error exist and how should I handle it?
Note: I have designed an IO_BUF which connects 3 pins and makes an inout connection. One for SDA and one for SCL.
3- After bit file generation with mentioned workaround (Not sure it will work), hardware handoff is not generated by VIVADO. I have to generate it using custom tcl commands found in the xilinx documentations.
Please provide support for the mentioned problems.
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msjatdigilent
Hi
There is a demo project for setting up Audio Codec on the Nexys Board here. After running the .tcl for project creation there are several problems:
1- The project is not compatible with Vivado 2017.4. I solved its many issues after several tries.
2- There are 6 I2C ports in the MicroBlaze block design for talking to the codec, whereas there should be 2 ports; i.e. SDA & SCL. When implementing design, BitGen fails for having no pin location for 6 I2C pins.
Why such an error exist and how should I handle it?
Note: I have designed an IO_BUF which connects 3 pins and makes an inout connection. One for SDA and one for SCL.
3- After bit file generation with mentioned workaround (Not sure it will work), hardware handoff is not generated by VIVADO. I have to generate it using custom tcl commands found in the xilinx documentations.
Please provide support for the mentioned problems.
A working project for such a demo is a must!
Tnahks
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