Question

I have found online lots or resources for creating arrays of signals, but what I have is the need to create an array of processes.  for example I have a simple process that adds 2 8bit signals:

sigT <= sig1 + sig2;

I would like to create an Array of a particular circuit design where I could use dozens, perhaps 100s and if I am able to upgrade to your Artix200 or kintex products soon perhaps 1000s.  can you direct me to such resources that might lead me to complete this kind of task please?
Sincerely,

DC

 

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Verilog has generate as well, but it is a bit different in the nested generate case.

Also, make sure that the area/time trade-off makes sense.  The goal is to describe a system that solves your problem.  If you need to add 1000000 numbers, maybe you can add 100 at a time and solve the problem over several cycles.

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10 hours ago, Piasa said:

Also, make sure that the area/time trade-off makes sense.  The goal is to describe a system that solves your problem.  If you need to add 1000000 numbers, maybe you can add 100 at a time and solve the problem over several cycles.

Indeed! Where do all those numbers that you want to add come from? They probably come from some shared memory or from some input ports. The shared memory or I/O ports are likely to be the main bottleneck limiting your design's performance.

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yes actually that is another concern I am currently using the USB port serial driver 128Kbits limit so 16Kbytes a second is kinda slow once you factor in handshaking two way data and commands its even slower.  using the Ethernet which I haven't learned yet might be an advantage, are there any resources on that?

 

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@DigitalConfig,

I don't know what FPGA board you are using but I can think of a few ways to get better than 16KB/s data transfer from most FPGA boards.

First of all, if you have 2 spare IO pins you can use a TTL compatible USB Serial cable ( or similar USB UART board ) to get at least 921600 baud to a PC. In theory, most of the FTDI USB devices on the typical FPGA board can to 3 Mbps/s but you might find that challenging on a Windows PC. Usually the same device on Digilent FPGA boards that do configuration via USB also have a UART functionality that will easily support the 921600 baud rate. On the PC end Python can handle this as well. If you need more than about 100KB/s data rates you'll have to experiment for yourself using your platforms. Adafruit and Sparkfun have cheap USB UART boards or cables and they are a good tool to have lying around.

If you have an FPGA board supporting the Adept DPTI parallel data USB 2.0 interface you can achieve up to 30 MB/s for large data transfers. Be aware the data rates for USB are highly dependent on data size even if you don't make any silly mistakes.

Finally, and let this be a secret between you and I, the Ethernet port can be used as a data hose ( no MAC in the FPGA logic so no processor either...) connecting two FPGA boards or an FPGA board and a PC. A problem with doing the FPGA board to PC things is that you are dependent on layers of drivers and code to do the heavy lifting ( unless of course you are prepared to write your own driver and your OS cooperates ) even if you use non-standard packet structures. Doing this isn't a weekend project for very many folks so expect to do a lot of experimentation as there isn't a lot of information about how to do this out there. If you take some time to peruse the Digilent Project Vault you can find a few projects with code samples that will help you along the trek.

Oh, I almost forgot to reply to your original question. Yes, in VHDL I've used GENERATE to create an array of processes though there are some subtleties to get right. 

 

Edited by zygot

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