Search the Community
Showing results for tags 'zynq7020'.
Hi, I am using the Embedded Vision Demo project for Image processing. I created a new filter by creating a new IP core for it in Vivado HLS 2017.4 (for the first time) referring to the filters used in the demo and then exported it. I added the new IP in the Embedded Vision Demo in Vivado 2017.4 and made the required connections followed by generating the block design. I was able to successfully complete all these tasks, however when I try to run the demo using Xilinx SDK 2017.4 (the same way I ran the demo prior to adding new filter) it does not read the switch change in hardware for this
Hi, I have a ZEDBOARD which I want to interface it to an analog input signal and see the sinusoidal output. i'm following lab 3 tutorial by Adam Taylor. So, as for the first step, I tried to connect the signal generator to Vn and Vp. I expected to see the sinusoidal shape of the voltage in XADC dashboard (XADC wizard demo). and also set the ENABLE_ALL_AUXILIARY_CHANNELS check mark, which will include Vp/Vn. I set the function generator to frq 50Hz and amplitude 400-600 vpp, or DC also I applied and checked the signal on the dashboard and serial oscilloscope both. But, the boar
Hi everyone Hope everything is going well. I want to communicate with can bus in PL as a master (in a real time system). In Micro-Controllers, there are functions and classes that control the CAN Bus as a master or slave and provide required data. Is there any detailed instruction to communicate with can bus in PL trough connecting to the CAN BUS Controller in PS? (AXI connections to CAN Controller Unit & ...)