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Found 6 results

  1. I'm trying to boot a Zedboard using a SD card, and it fails. The Power good LED is on, but the 'Done' light remains off. I tried 4 different SD cards (all UHS-I), but later read that UHS-I cards aren't supported, so I'm using a non-UHS card and it still fails to boot. MIO6:2 headers are '01100', which is the SD card boot configuration. I've also shorted JP6 on the board. VADJ is at 1.8V The board boots successfully from QSPI - the blue LED and 4 red LEDs come on. I formatted the SD cards using both: the official SD Card Formatter & Windows 10's inbuilt 'Format' Then I copied the 5 files from the Out-of-box Demo on Digilent's website: I've also tried the 'zedboard_oob_design' from the Avnet forums, and the Analog Devices images from their website - and the board still fails to boot. I've tried the SD cards on another Zedboard, and it fails to boot on that one as well. The UART doesn't print anything (115200, 8N1) either. Is there anything I'm forgetting to check? Does the SD card require a specific format, sector size, partitions etc?
  2. Hello, I'm looking for an evaluation board that feature "smart" power management (e.g. over PMBus). Thanks.
  3. Hello! Me and my colleagues want to do a project and we are thinking about using one of the various development boards with Zynq-7000 for that purpose. Basically we just want to sample and measure some signals and transfer them to a PC (preferably via gigabit-ethernet) for evaluation. So the Zynq would have to do a real-time hardware-in-the-loop task. The signals we want to measure are as follows: 3 analog signals sampled @ 1 kHz by an ADC 3 analog signals sampled @ 100 kHz by an ADC 2 incremental encoders the frequency of a quadrature pulse signal (we would need a pin for edge-detection and a counter that counts the time between the edges) However, the documentation of those Zynq-7000 development boards on the internet is quite poor. In most hardware user guides I only found that the Zynq-7000 only has the XADC which is dual, but we would need to sample 6 different signals. I have neither found any support for incremental encoder interfaces, nor any GPIOs that are capable of accessing a software timer for edge-detection. In the Xilinx forum somebody recommended using the PYNQ-Z1 but I do not know how freely you can program the Zynq-7000 with Python. As I said, we would need at least two interfaces for incremental encoders and I have seen some examples how to implement this on an FPGA. But those examples always included coding in VHDL. Is it possible to program the Zynq-7000 in Python with the same degree of freedom as in VHDL? Which development board (and maybe additional boards/cards) would you suggest to use and why? Best regards!
  4. Hello all. I have some misunderstanding with TTCs on zynq-7000. I used this guide to understand how TTCs are working, but seems like a quite subtlety which I don't understand. I have to use 2 TTCs with PWM (match value) and change RC in handlers to make CNC. After trying to make it like get new RC in handler and change RC I got unstable error for about 0.5s for 25s of changing RC and some impulses haven't generated but handler was called instantly after changing RC (I took into account that (RC - match value) should be greater then 0). I thought it can be because I have to: 1) reduce time we waste in handler (some code fragments like change RC made by asm); 2) consider some information we lose when we shift RC to prescaler; 3) consider counter of my timer because there are sometimes another handlers or something; 4) when we change RC we should reset counter (special bit in XTTCPS_CNT_CNTRL register); 5) see if RC is less then counter - make RC as match value (never happens). After this manipulations I saw that my timers with same amount RC (before counter compensation) ends in different time (I used different counters so timers have different number of RC). Can someone help me? P.S. I tried to use inline functions with asm() to change RC. Universal (by transmit using timer number) and 2 different functions with same (different only address to timer) asm code, and I got different results. I don't understand why. Thanks!
  5. Hi, I am looking to implement the use of Ethernet port of the Zybo board without Zynq PS. I am using Windows OS and Vivado 2017.2. I have already implemented the Iwip echo server project. Is there any suggestions or guideline about the use of Ethernet port on Zybo without Zynq PS? Thank you in advance. BR ALI
  6. Hi, I'm using Digilent's XUP USB-JTAG Programming Cable to program 'Z-turn board' which uses Xilinx Zynq-7000( There was no problem when I programed Bitstream or BBRAM through JTAG, but when I tried to program eFUSE Xilinx Vivado threw an error - ERROR: [Labtools 27-3277] jsn-DLC9LP-00000000000000 cable is not supported for EFUSE programming. Please use a Xilinx PCUSB2 DLC10 or approved Digilent cable I think my cable is approved one. Does anyone have any solution for this? Thank you in advance.