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Found 278 results

  1. Zynq-7000 TTC counter and RC

    Hello all. I have some misunderstanding with TTCs on zynq-7000. I used this guide to understand how TTCs are working, but seems like a quite subtlety which I don't understand. I have to use 2 TTCs with PWM (match value) and change RC in handlers to make CNC. After trying to make it like get new RC in handler and change RC I got unstable error for about 0.5s for 25s of changing RC and some impulses haven't generated but handler was called instantly after changing RC (I took into account that (RC - match value) should be greater then 0). I thought it can be because I have to: 1) reduce time we waste in handler (some code fragments like change RC made by asm); 2) consider some information we lose when we shift RC to prescaler; 3) consider counter of my timer because there are sometimes another handlers or something; 4) when we change RC we should reset counter (special bit in XTTCPS_CNT_CNTRL register); 5) see if RC is less then counter - make RC as match value (never happens). After this manipulations I saw that my timers with same amount RC (before counter compensation) ends in different time (I used different counters so timers have different number of RC). Can someone help me? P.S. I tried to use inline functions with asm() to change RC. Universal (by transmit using timer number) and 2 different functions with same (different only address to timer) asm code, and I got different results. I don't understand why. Thanks!
  2. Live video processing on Zybo board?

    Dear expertise, I have implemented the hybo_hdmi_in demo and it's perfectly working. Now, I want to show a binary mask in the region of interest at the VGA output. Now, my question, Is it possible to do it only by modifying video_demo.c file. Any kind of coding related idea will be helpful. Thanks in advance- Shuvo
  3. Zybo: Access the LD_MIO LED from the FPGA

    Hi, I have a Zybo board and am using Vivado 2017.2. I have successfully written a number of VHDL modules allowing me to access the boards push-buttons, LEDs and slide switches using only the PL part of the device. I wondered if it was all possible to drive the LD_MIO LED from the FPGA? From my understanding it should be possible using the EMIO but have not been able to find an example or tutorial that shows how it is done. Regards FarmerJo
  4. FreeRTOS on Zybo

    Hello Everyone, This is just for reference. FreeRTOS running on the Zybo. I could not find any FreeRTOS based post on this forum so i thought this might help anyone trying to attempt the same...
  5. Hello everyone! I'm not sure whether this forum is the right place to ask this question but still. I have connected a low-cost OV7670 camera to this Digilent example: Here is what I've done. I took the OV7670 - > AXI4Stream core from here (link below) and attached it instead of HDMI input. I changed this module to have not 32 bit RGBA output but 24 bit RGB input and also I took the OV7670 Controller from here (link below) and also attached it to the design The system works o'k. What I would like to do is to remove the HDMI part from this design. I just want the image to be captured by the camera and be shown on VGA screen. If I understand it right the axi_gpio_video and the v_tc_1 ip-cores send some interrupt essential for the stream to start. I am interested and I have no understanding of what I have to do to remove the HDMI part from the design so that I always saw the image from my OV7670. Do I have to somehow simulate the interrupts? Can I do this in C code? Thank you very much for response in advance.
  6. I use a 10MHz clock and a 2-bit register to generate a 100 ns pulse at a frequency of 2.5 MHz(100 ns on, 300 ns off).The signal is output through an IOBFF into the pin JC1 (V15), which drives a 180 ohm resistor. According to the reference manual, JC is one of the 3 high speed PMODS, but despite this my rise and fall times are around 5-7 ns.The slew rate is set to "FAST" and the drive strength is set to "16".I want to decrease the rise and fall times to their absolute minimum value possible. The code for generating the pulse : reg [1 : 0] counter = 0; always @ (posedge clk) begin if(!reset) begin counter <= 0; gnd <= 0; pulse <= 0; end else begin counter <= (counter == 3)? 0 : counter + 1; //10MHz/4 = 2.5MHz , Period = 400ns pulse <= (counter == 3)? 1 : 0; //Pulse Length = 0.1us = 100ns gnd <= 0; end end The 'gnd' signal from the code is connected to the adjacent pin(JC2). I am also attaching images of the observed waveforms (both rise and fall) .The oscilloscope uses a BNC cable which is terminated at 50 ohms.To reduce measurement inaccuracy, I have tried to keep the ground wire short. The 180 ohm resistor,directly connected to the PMOD header, is being used to limit the current drawn from the pin.The fall time seems to be less than the rise time by about 1 ns, but it still is 5 ns, at least. What can I do to reduce the rise and fall time of an IO? From what I understand, using a higher frequency clock or an ODDR would have no effect as the switching should really be governed only by the DC characteristics. Thank you!
  7. are there any tutorials for dummies on getting a zybo board to produce a tone? one that thoroughly explains its steps?
  8. Zybo tutorial help

    i currently have a project where i need to produce a tone from a zybo board and to familiarise myself with the board i downloaded the pdf from and the zip files but and i do the tutorials step for step but when i try to run the programme on the board nothing happens im using vivado 2017.1 i have the ports set to 115200 baud when i import the c code i get a warning from xparamaters.h i asked my project manager and they said its because im not using costraints but the turtorial specifically mentions not using constraints can anyone tell me what am i doing wrong despite the fact im doing the tutorial step for step?
  9. Image Processing on Zybo

    I'm making a project about image processing. The board used in the project is the Zybo board and operates on a frame 1920x1080 (Full HD). My project is Square Area Detection Then motion detection within the rectangular area. I would like to ask for advice or guidance directs the operation of the mine. (I'm new to Zybo boards and I just learned recently.) If anyone has suggestions and links for learning. Please direct me and attach the link. Thanks in advance. ^__^
  10. HDMI DEMO Project - Problems VIVADO 2017.1

    Hi, I have a lot of problem importing project. I had imported HDMI project and I use zybo board. When I started create_project.tcl vivado get me critical errors, so I decided to enter commands manually. I had errors because on create_project.tcl there aren't commands to upgrade the IP blocks. I have resolved it. now i have 193 warning and 1 critical warning (table1.xlsx file): [Timing 38-282] The design failed to meet the timing requirements. Please see the timing summary report for details on the timing violations. Can you help me to correct this? I can generate bitstream but i have a problem. After I had exported hardware and i had launch sdk I need to import project. I have so many errors!!!!! I attach sdk log txt file. There is a big problem on include folder on the left menu. I had try to add on HDMI_IN_bsp the ps7_cortexa9_0 folder that I have found in a forum , I have deleted hdmi-in.sdk folder from my project, and I try again export hardware, launch sdk, import project. I have resolve the problem of include folder on left menu but still I have problems with libraries. I think there are some compatibility problems in the project on Vivado 2017.1. Do you know how i can fix it? Can you update the project? Thanks Andrea Table1.xlsx sdk log.txt
  11. Hello This is the second project for me in FPGA for fun. I want to connect external board with 7 seg as a counter, so I put this Verilog code with this XDC file but the output is something error , could you please figure it out? I use common Anode display PMOD XADC pin 1 ---> pin 12 (7 Seg) pin 2 ----> Pin 9 pin 3 ---> Pin 8 pin 4 -----> pin 6 ------------------------ PMOD JB pin 1 ---> pin 11 pin 2----> pin 7 pin 3-----> pin 4 pin 4 ----> pin 2 pin 5 ----> pin 1 pin 6 ---> pin 10 pin 7 ----> pin 5 pin 8 ----> pin 3 Thanks seven.v Master_zybo.xdc
  12. Video output at VGA monitor

    Dear experts, I am actually new in this field and have a very few experience with zybo board. I have implemented the zybo_hdmi_in_demo which is required for my master thesis. Output video streaming at the VGA monitor shows a cropped part of my input video source. What should I do now? And can I use other HDMI source rather than my PC? And what is the preferred input HDMI video resolution? any kind of support or suggestions is highly appreciated.
  13. Greetings, I am currently working on a Digilent Zybo Trainer Board with a Zynq 7010 chip. Everything works fine from hardware up to software running on the board as long as it is launched directly from the Xilinx SDK. However, the software hangs up indefinitely whenever the Xil_In32() function is called ONLY when booting from non-volatile memory (QSPI flash or SD card). I have followed the prescribed process of making an FSBL, creating a boot image (with (bootloader)FSBL.elf, hw_wrapper.bit, main_project.elf) and programming the BOOT.bin file to flash memory successfully. The FSBL calls the 'ps7_init()' and ps7_post_config()' functions. My research shows that this issue revolves around enabling the level shifters, but as far as I can tell this occurs in the ps7_post_config() function. Any help would be appreciated. Details: Hardware: Zybo Trainer Board (Zynq 7010) Hardware peripherals: XADC Wizard, AXI GPIO Project: standalone C project Vivado 2017.2 Xilinx SDK 2017.2 OS: Windows 7 Enterprise SP1
  14. PmodRS485 on Zybo

    For various reasons I need to use RS485 for communication with my Zybo board. PmodRS485 seems to be a perfect add-on module, however, so far I could find only an MPIDE example. In my understanding Xilinx Uart should be the way to go because the Analog Devices chip is supposed to take care of the protocol. Correct me if I am wrong. Hope someone has such experience and can share it with us. Thank you!
  15. Zybo 7010 Board File Integration

    Hello, I am quite new to the Zybo Zynq 7010 and Vivado in general. I have tried various tutorials involving the use of the Zynq Processing System and Axi GPIO to blink LEDs on the board. No errors in the proccess, but the LEDs do not blink at the end. I followed one thread regarding Integration of the Board files in Vivado but I still seem not to have any success as the LEDs still do not blink. I am also unable to access UART which I am guessing sterns from the same problem. Any solutions on installing/integrating board files/parts on Vivado for Zynq 7010 ???
  16. Zybo I2c Master

    Hi, I have the Zybo Zynq 7000 board (Z-7010). I also have a Ti Msp430G2 launchpad. I need the Zybo to be the Master I2c , send request data from the Ti Chip. In Zybo i'm Using the I2c_0 Built in controller on the ps, i've tried the following Examples with no success(test failed Everytime): xiicps_polled_master_example.c xiicps_slave_monitor_example.c then i tried to to troubleshoot the problem, i'v used the xiicps_polled_slave_example.c and on the Ti Chip i used the wire library, as I2c Master and a c program that Scans Addresses - this works Therefor all the connections and vivado config are fine. How can find a working Master Program for zybo?
  17. making U-boot.elf For Zybo Zynq

    I am attempting to make the u-boot.elf file for the Zybo following this guide. I have a problem in Step 21: Compile U-Boot I am running into an error though that I am not sure how to resolve. Has anyone seen this before? I just learn about Zybo board. Thanks in advance. Using - Vivado 2014.1 - Host : Debian 9.2 nattaponj@debian:~/zybo_debian$ source /opt/Xilinx/Vivado/2014.1/ nattaponj@debian:~/zybo_debian$ git clone Cloning into 'u-boot-Digilent-Dev'... remote: Counting objects: 252883, done. remote: Total 252883 (delta 0), reused 0 (delta 0), pack-reused 252883 Receiving objects: 100% (252883/252883), 72.54 MiB | 158.00 KiB/s, done. Resolving deltas: 100% (200043/200043), done. nattaponj@debian:~/zybo_debian$ make CROSS_COMPILE=arm-xilinx-linux-gnueabi- zynq_zybo_config make: *** No rule to make target 'zynq_zybo_config'. Stop. nattaponj@debian:~/zybo_debian$ cd u-boot-Digilent-Dev/ nattaponj@debian:~/zybo_debian/u-boot-Digilent-Dev$ make CROSS_COMPILE=arm-xilinx-linux-gnueabi- zynq_zybo_config Configuring for zynq_zybo board... nattaponj@debian:~/zybo_debian/u-boot-Digilent-Dev$ sudo make CROSS_COMPILE=arm-xilinx-linux-gnueabi- [sudo] password for nattaponj: make: arm-xilinx-linux-gnueabi-gcc: Command not found /bin/sh: arm-xilinx-linux-gnueabi-gcc: command not found dirname: missing operand Try 'dirname --help' for more information. Generating include/ /bin/sh: line 3: arm-xilinx-linux-gnueabi-gcc: command not found Generating include/ /bin/sh: line 3: arm-xilinx-linux-gnueabi-gcc: command not found make: arm-xilinx-linux-gnueabi-gcc: Command not found /bin/sh: arm-xilinx-linux-gnueabi-gcc: command not found dirname: missing operand Try 'dirname --help' for more information. /bin/sh: arm-xilinx-linux-gnueabi-gcc: command not found /bin/sh: arm-xilinx-linux-gnueabi-ld: command not found Generating include/ /bin/sh: line 3: arm-xilinx-linux-gnueabi-gcc: command not found Generating include/ /bin/sh: line 3: arm-xilinx-linux-gnueabi-gcc: command not found arm-xilinx-linux-gnueabi-gcc -DDO_DEPS_ONLY \ -g -Os -ffunction-sections -fdata-sections -fno-common -ffixed-r8 -msoft-float -fno-strict-aliasing -mno-unaligned-access -D__KERNEL__ -I/home/nattaponj/zybo_debian/u-boot-Digilent-Dev/include -fno-builtin -ffreestanding -nostdinc -isystem -pipe -DCONFIG_ARM -D__ARM__ -march=armv5 -Wall -Wstrict-prototypes \ -o lib/asm-offsets.s lib/asm-offsets.c -c -S make: arm-xilinx-linux-gnueabi-gcc: Command not found Makefile:747: recipe for target 'lib/asm-offsets.s' failed make: *** [lib/asm-offsets.s] Error 127 nattaponj@debian:~/zybo_debian/u-boot-Digilent-Dev$ or nattaponj@debian:~/zybo_debian/u-boot-Digilent-Dev$ export CROSS_COMPILE=arm-xilinx-linux-gnueabi- nattaponj@debian:~/zybo_debian/u-boot-Digilent-Dev$ export ARCH=arm nattaponj@debian:~/zybo_debian/u-boot-Digilent-Dev$ sudo make make: arm-linux-gcc: Command not found /bin/sh: arm-linux-gcc: command not found dirname: missing operand Try 'dirname --help' for more information. /bin/sh: arm-linux-gcc: command not found /bin/sh: arm-linux-ld: command not found arm-linux-gcc -DDO_DEPS_ONLY \ -g -Os -ffunction-sections -fdata-sections -fno-common -ffixed-r8 -msoft-float -fno-strict-aliasing -mno-unaligned-access -D__KERNEL__ -I/home/nattaponj/zybo_debian/u-boot-Digilent-Dev/include -fno-builtin -ffreestanding -nostdinc -isystem -pipe -DCONFIG_ARM -D__ARM__ -march=armv5 -Wall -Wstrict-prototypes \ -o lib/asm-offsets.s lib/asm-offsets.c -c -S make: arm-linux-gcc: Command not found Makefile:747: recipe for target 'lib/asm-offsets.s' failed make: *** [lib/asm-offsets.s] Error 127 nattaponj@debian:~/zybo_debian/u-boot-Digilent-Dev$
  18. Hi Everyone, I was trying to capturing hdmi signal and display video on VGA monitor using DVI to RGB IP Core (version 1.6 or 1.7). Everything works correctly for 800x600 1024x768 and 1280x720. But for other resolutions (1280x1024 1600x900 1680x1050 and 1920x1080) image on external VGA monitor has very poor quality. Could anyone suggest where is the problem. In dvi2rgb spec I've found info about constraining tmds clock so based on my calculation for ZYBO IP Core should work correctly for 1680x1050 resoultion (tmds clock is about 120). I am using this IP Core in bigger project and I need to explain where is the problem. I can also upload my project in Vivado. Thanks for any help
  19. Hi, I'm trying the tutorial(, but it doesn't work. I create a project in Vivado 2016.2 and SDK 2016.2. So, may I have the sample project in vivado and sdk 2016.2? Thanks, TM-san
  20. Zybo or Zybo-Z7 for MIPI CSI-2 experimentation?

    Hi all, I have a Zybo and have been using it successfully for a variety of HDMI / VGA video projects. I'd like to have a go at interfacing a Raspberry Pi V2 camera. I understand that I need to implement a MIPI CSI-2 receiver in VHDL and I have a reasonable idea of how to proceed. This may take a bit of effort, but that's part of the fun! However, what I'm not sure about is whether I can specify the appropriate 1.2v IO Standard that's required on the Zybo board via the high speed PMOD ports? Or, will I need to buy one of the newer Zybo-Z7 boards? I realise that the newer Zybo-Z7 boards have a 2 lane MIPI connector (which is very convenient), so I'm assuming that the connected Zynq pins can run in the appropriate 1.2v differential IO Standard. But for this to work does the newer Zybo-Z7 have a specific 1.2v VCC supply to facilitate this? (that perhaps the Zybo doesn't have) I will probably upgrade to the newer board anyway, but would like to understand if this is possible on the older Zybo. Many thanks!
  21. Zybo I2C

    Hi, I have the Zybo Zynq 7000 board (Z-7010). I want to receive data from Multiple Devices via I2C protocol. In the PS there are 2 I2C Controllers. The Steps i made so far: 1) In vivado i created the ip : Zynq7 processing system. 2) i'v enables the I2C 0 controller and routed it to Emio. at this point i need 2 pins: clock and data, but instead i have 6 pins: where should i connect the pins? after Exploring this issue online i saw another option : using the Axi_IIc ip, With the same problem:
  22. Hi, I'm trying to set up the USB OTG on Zybo board. I've done the following: 1. Checked the "Peripherals I/O pin" field for the USB0 and MIO as well for reset the PHY chip into Re-customize IP ( double click on zynq ).It matched with the schematics. 2. I have checked the devicetree auto-generated by SDK ( 2017.2 ).I have attached it. Seems to be good. 3. I have plugged my usb key on J10 ( the bigger USB connector ) as I want zybo to be a host controller. 4. The jumper JP1 is shorted. 5. The MIO 46 have to provide the reset signal to the PHY chip if I understand correctly 6. The connection between zynq ps and PHY is ULPI ( 12 signals from MIO 28 to 39 ) 7. When I boot the whole thing the device driver is correctly registered ( dmesg | grep usb ) but my usb key is not recognized. 8 If i stop the u-boot autoboot and issue the followings: - usb info ---> says that the usb is stopped - usb reset --> it rescan and detect correctly the host conroller and the usb key - boot --> boot the whole thing but the usb key is not recognized. I have searched a lot and, if I understand well, the following line on devicetree: usb-reset = <&gpio0 46 0>; declare that the gpio 46 have to became the reset signal for PHY chip ( active low , I have checked on Vivado into re-customize ip menu ) and in fact the "usb reset" on u-boot shell works but I don't know why I cannot recognize my usb key. I have also read that the fsbl have to issue the reset signal. I have done a search on fsbl source code and I have not found any USB reset function or something similar. The only thing that I have found is into ps7_init.c but honestly I can't understand a lot of that code... Anyone have encountered the same problem?? I have read that many peaple had problems with zybo USB OTG. I have also tried to do this into u32 FsblHookBeforeHandoff(void) but it doesn't boot ( maybe my mistake I have to retry ). Thanks in advance. Michele pcw.dtsi system-top.dts zynq-7000.dtsi
  23. Hello everyone and nice to meet you. I am a user of Zybo and until today everything was fine. But today I tried to use this board with a BLDC motor control board and something went wrong... The motor was not connected to the board, but battery was. The goal was to check correct operation of the MOSFETs (by PWM) at the control board and check it with oscilloscope. When I didn't see what I wanted to see, I turned Zybo off and back on, but it didn't turn on. The symptoms are as follow: - Short circuit between VCC3V3 and GND; - All other voltages are not short circuited; - The voltage converter seems ok too. Unsoldered R259 (zero Ohm resistor between converter's output and other circuit), but short circuit still remains. - Resistance of the pin used for PWM (to control MOSFET hi-driver) is infinite; - Zener diode connected to this pin changed its internal resistance as well (unsoldered it but it didn't change anything); - All other PMOD pins have finite resistance ~600 kOhm; - The PWM pin was surely connected to an input pin of the MOSFET driver. Is there any way to check if it is a permanent internal damage of FPGA without unsoldering it or not? I am pretty sure it happened because of that PWM pin but don't know why exactly. It might happen because of static discharge (though Zener diode should protect against it) or incorrect connection somewhere else by accident. Thank you for your time. Hope to get some hints soon. Regards,
  24. Hi, I am looking to implement the use of Ethernet port of the Zybo board without Zynq PS. I am using Windows OS and Vivado 2017.2. I have already implemented the Iwip echo server project. Is there any suggestions or guideline about the use of Ethernet port on Zybo without Zynq PS? Thank you in advance. BR ALI
  25. Heat Sink for Zybo

    I recently purchased a Zybo board and I noticed that its FPGA IC is becoming little hot for a small programs such as blinking an LED. What I would like to know is if I will have to use a heat sink for the chip for more complex and advanced designs? Thanks in advance.