Search the Community

Showing results for tags 'zybo'.



More search options

  • Search By Tags

    Type tags separated by commas.
  • Search By Author

Content Type


Forums

  • News
    • New Users Introduction
    • Announcements
  • Digilent Technical Forums
    • FPGA
    • Digilent Microcontroller Boards
    • Non-Digilent Microcontrollers
    • Add-on Boards
    • Scopes & Instruments
    • LabVIEW
    • FRC
    • Other
  • General Discussion
    • Project Vault
    • Learn
    • Suggestions & Feedback
    • Buy, Sell, Trade
    • Sales Questions
    • Off Topic
    • Educators
    • Technical Based Off-Topic Discussions

Find results in...

Find results that contain...


Date Created

  • Start

    End


Last Updated

  • Start

    End


Filter by number of...

Joined

  • Start

    End


Group


AIM


MSN


Website URL


ICQ


Yahoo


Jabber


Skype


Location


Interests

Found 351 results

  1. Hello, I am new to Zybo/FPGA and currently going thru the tutorial that's available. Currently at the DMA tutorial. From what I understand, there are 2 method to do the project, using SDK or Vivado. When I tried using SDK, I have a whole bunch of missing inlcudes like xparameters.h, xgpio.h, xstatus.h (to name a few). So, I went the Vivado route. When attempting to run the tcl script, I had errors on line 67. update_ip_catalog -rebuild. Was able to resolve that by using the vivado library. Now, I'm stuck with errors stating that IPs are locked. I am trying to follow this recommendation to change the version, but, I can't find the system.tcl file. Any suggestions?
  2. yottabyte

    [Zybo Z7] Which Zynq to choose in Vivado

    please delete. thx /edit
  3. Hi folks! I'm planning to make my own I/O extension board for the ZYBO, connecting directly through JB to JE. Therefore I need the exact dimensions of the board itself and the exact location of the connectors JB to JE in respect to let's say the left edge of the board. Is there somebody around that could provide that information? Thanks in advance. Thomas
  4. Baskoud

    ZYBO license/voucher in Europe

    Hello all, I use ZyBo for a long of time and now that my license expired I want to update it. I live in France and I haven't found a provider that gives just a voucher to continue using Vivado/Vivado HLS and SDK. I found some websites like this https://www.digikey.fr/product-detail/fr/digilent-inc/240-067/1286-1051-ND/4840817 that provide the voucher but plus staff that I don't need. Is there a place where I can buy the voucher/license without anything else here in Europe. Thanks in advance, Spyros
  5. Hi. i'm newbie in electronic engineering. i start to study soc with zybo. When i saw schemetic of ZYBO, i founded some symbol that i have not ever seen. i attached picture. what does red symbol mean?
  6. hello everyone, I need help in hardware requirement for the xmcdma_interrupt_example.c test. I tried below example design as in program it is for 8 channels and the mm2s port is connected to s2mm port. At the output, it is showing Entering main( ).but not going further in the code. please help me with this. thanks in advance, Regards amit
  7. Scarlet

    Zybo Z7-10 with Linaro

    I am trying to boot Linux with Linaro file system on Zybo Z7-10 without Petalinux. I would like to connect a monitor to HDMI TX output to be able to see Linaro graphical interface but I am getting errors while Linaro Ubuntu is booting, and nothing is being shown on the monitor. I am sure that HDMI output works on my board since I got HDMI demo project to work. I am using Zybo base system design from here, adapted to Zybo Z7 on Vivado 2018.2. I have generated device tree from this design using Xilinx SDK following this tutorial. I am using Digilent's u-boot and Linux kernel and I've downloaded Linaro file system from here (last file). These are the errors that are showing up when Linaro Ubuntu is booting: systemd-bootchart.service failed. [ OK ] Started Remount Root and Kernel File Systems. [ OK ] Started Create Static Device Nodes in /dev. Starting udev Kernel Device Manager... Starting Load/Save Random Seed... [ OK ] Reached target Local File Systems (Pre). [FAILED] Failed to start Load Kernel Modules. See "systemctl status systemd-modules-load.service" for details. systemd-modules-load.service failed. Starting Apply Kernel Variables... [ OK ] Started udev Coldplug all Devices. [ OK ] Started Increase datagram queue length. [FAILED] Failed to mount Temporary Directory. See "systemctl status tmp.mount" for details. [FAILED] Failed to start RealtimeKit Scheduling Policy Service. See "systemctl status rtkit-daemon.service" for details. My goal is to enable HDMI output on Zybo Z7. I suspect that these errors are the cause of the problem, but I am not sure if there is any additional step I need to perform to get HDMI to work, like enabling some drivers in Linux kernel, or configuring the device tree. I have tried using different Linux kernel versions (by checking out different tags from Digilent's repository), using different versions of Linaro file system, using default device tree for Zybo Z7 provided with Linux kernel, but I've had no success since various errors are always showing up. I would appreciate any help or someone pointing me in the right direction, since I am not sure what is the cause of the problem. Thank you!
  8. JF_Stephen

    First question on here.... [Zybo DDR]

    OK... I've pored over the forums, and found many questions tangentially related to my topic, yet cannot figure out the answer to my question. I'm using the *original* Digilent Zybo board, i.e. it has a VGA port. I've used one personally for a while now, but I'm now doing a project at work on a new Zybo. I cannot, for the life of me, get the DDR to be configured to work properly. I have tried every which way... including a custom memory part but it is all to no avail. I tried to get around this by using OCM, and it works, but then I could not get the QSPI to flash with my execute in place linker script... something I've done several times for work on the Zedboard. Can someone please help me with the correct DDR configuration so I can get this out from over my head? I'm attaching the current DDR configuration... any help is greatly appreciated. Thank you!
  9. I am trying to boot embedded linux on Zynq Zybo with reference to this document: http://80.93.56.75/pdf/0/7/6/4/8/07648722.pdf I have created boot.bin(containing FSBL.elf, my custom hardware bit file and u-boot.elf) devicetree.dtb, uimage and uramdisk.img.gz in ZYBO_BOOT in sdcard as given. When I tried to boot Zybo inserting SD card in the board, nothing shows in the hyperterminal. Instead of my custom hardware, I have created a boot.bin file from the ZYBO Base System Design (available on the ZYBO product page of the Digilent website). Now it responded but showed the following error in the hyperterminal: MAC Addr: D8 80 39 5C F9 FC No valid device tree binary found - please append one to U-Boot binary, use u-boot-dtb.bin or define CONFIG_OF_EMBED. For sandbox, use -d initcall sequence 04062bf8 failed at call 04046944 (err=-1) ERROR ### Please RESET the board I think the error is from the u-boot-digilent/lib/fdtdec.c when CONFIG_SPL_BUILD is not defined. But the reason for not defining it is not known! What would be the reason?
  10. greedyhao

    Timing constraints are not met.

    Hello, When I following The Zynq Book Tutorials(exercises 5b) , I met a error unfortunately. It says that 'Timing constraints are not met.'. I have no idea how to solve it. Could anybody do me a favor. timing_1.rpx ------ More detail shows below:
  11. I am trying to access the audio codec SSM2603 on ZYBO over i2c interface from linux user-space for some register get and set, what i did so far I enabled in the device-tree PS I2C_0 in system-user.dtsi &i2c0 { ssm2603: ssm2603@1a{ #sound-dai-cells = <0>; compatible = "adi,ssm2603"; reg = <0x1a>; }; i2cdetect -l output i2c-1 i2c Cadence I2C at e0004000 I2C adapter i suppose i2c coec should appear on address 0x1a but nothing i2cdetect -y -r 1 0 1 2 3 4 5 6 7 8 9 a b c d e f 00: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- if i add the codec drivers in my kernel snd_soc_ssm2602_i2c.ko and snd_soc_ssm2602.ko the i2cdetect -y -r 1 00: -- -- -- -- -- -- -- -- -- -- -- -- -- 10: -- -- -- -- -- -- -- -- -- -- UU -- -- -- -- -- which means the i2c device is detected on 0x1a address but its been used by the driver. what i want to do is to make the raw i2c register get /set using i2cget/i2cset but the codec didn't appear without driver, any clue?
  12. hi everyone, i download the example hdmi_in and i'm tryong to open it with vivado but while i'm running the tcl script occurs this error: ERROR: [BD 5-216] VLNV <digilentinc.com:ip:axi_dynclk:1.0> is not supported for the current part. ERROR: [Common 17-39] 'create_bd_cell' failed due to earlier errors. while executing "create_bd_cell -type ip -vlnv digilentinc.com:ip:axi_dynclk:1.0 axi_dynclk_0 " (procedure "create_root_design" line 50) invoked from within "create_root_design """ (file "../src/bd/system.tcl" line 1669) while executing "source $origin_dir/src/bd/system.tcl" (file "C:/Users/Damiano Balzani/Documents/zybo/Progetti/2015.4/hdmi_in/proj/create_project.tcl" line 102) can you help me?
  13. Hi, I'm not able to fully understand the relation between the Board file and the Constraints file in Vivado. In my design I need to connect a custom IP block to a Pmod connector on a ZYBO board. I've loaded the XML board file provided by Digilent but now I'm not anymore able to customize the pins as i would do with a constraint file since it seem to me that the mapping it is now specified in the XML file. # Pmod connector JB set_property PACKAGE_PIN T20 [get_ports {d_out[0]}] set_property PACKAGE_PIN U20 [get_ports {d_out[1]}] set_property PACKAGE_PIN V20 [get_ports {d_out[2]}] set_property PACKAGE_PIN W20 [get_ports {d_out[3]}] set_property IOSTANDARD LVCMOS33 [get_ports {d_out[*]}]Should I need to add a constraint file even if the Board port mapping is already specified by the board file? Is this a good practice? Thanks
  14. Hi everyone, I'm working on a project in which I've to store data that've been read from SD card into the BRAM in SDK (PS). and read that data from PL in Vivado. The question is how should I connect the BRAM Generator IP with the ZYNQ7 PS IP to give the BRAM access in PS.
  15. Hello, I am new in zybo. I am using Vivado 2018.2. The platform is Ubuntu 18.04. I met a trouble when I following the Zynq Book Tutorials, the first exercise , step by step. The tutorial seemed to be fine before I launched the program on hardware(GDB). The LED didn't blink at all. I googled for a while, but no results Here is the picture of my board. The following is my SDK Log. 12:11:42 INFO : Connected to target on host '127.0.0.1' and port '3121'. 12:11:42 INFO : 'targets -set -filter {jtag_cable_name =~ "Digilent Zybo 210279539437A" && level==0} -index 1' command is executed. 12:11:45 INFO : FPGA configured successfully with bitstream "/home/greedyhao/LearningAndWorking/first_zynq_design/first_zynq_design.sdk/first_zynq_system_wrapper_hw_platform_0/first_zynq_system_wrapper.bit" 12:11:52 INFO : 'targets -set -filter {jtag_cable_name =~ "Digilent Zybo 210279539437A" && level==0} -index 1' command is executed. 12:11:52 INFO : 'fpga -state' command is executed. 12:11:52 INFO : Connected to target on host '127.0.0.1' and port '3121'. 12:11:52 INFO : Jtag cable 'Digilent Zybo 210279539437A' is selected. 12:11:52 INFO : 'jtag frequency' command is executed. 12:11:52 INFO : Sourcing of '/home/greedyhao/LearningAndWorking/first_zynq_design/first_zynq_design.sdk/first_zynq_system_wrapper_hw_platform_0/ps7_init.tcl' is done. 12:11:52 INFO : Context for 'APU' is selected. 12:11:52 INFO : Hardware design information is loaded from '/home/greedyhao/LearningAndWorking/first_zynq_design/first_zynq_design.sdk/first_zynq_system_wrapper_hw_platform_0/system.hdf'. 12:11:52 INFO : 'configparams force-mem-access 1' command is executed. 12:11:52 INFO : Context for 'APU' is selected. 12:11:52 INFO : 'stop' command is executed. 12:11:52 INFO : 'ps7_init' command is executed. 12:11:52 INFO : 'ps7_post_config' command is executed. 12:11:52 INFO : Context for processor 'ps7_cortexa9_0' is selected. 12:11:52 INFO : Processor reset is completed for 'ps7_cortexa9_0'. 12:11:53 INFO : Context for processor 'ps7_cortexa9_0' is selected. 12:11:53 INFO : The application '/home/greedyhao/LearningAndWorking/first_zynq_design/first_zynq_design.sdk/LED_test/Debug/LED_test.elf' is downloaded to processor 'ps7_cortexa9_0'. 12:11:53 INFO : 'configparams force-mem-access 0' command is executed. 12:11:53 INFO : ----------------XSDB Script---------------- connect -url tcp:127.0.0.1:3121 source /home/greedyhao/LearningAndWorking/first_zynq_design/first_zynq_design.sdk/first_zynq_system_wrapper_hw_platform_0/ps7_init.tcl targets -set -nocase -filter {name =~"APU*" && jtag_cable_name =~ "Digilent Zybo 210279539437A"} -index 0 loadhw -hw /home/greedyhao/LearningAndWorking/first_zynq_design/first_zynq_design.sdk/first_zynq_system_wrapper_hw_platform_0/system.hdf -mem-ranges [list {0x40000000 0xbfffffff}] configparams force-mem-access 1 targets -set -nocase -filter {name =~"APU*" && jtag_cable_name =~ "Digilent Zybo 210279539437A"} -index 0 stop ps7_init ps7_post_config targets -set -nocase -filter {name =~ "ARM*#0" && jtag_cable_name =~ "Digilent Zybo 210279539437A"} -index 0 rst -processor targets -set -nocase -filter {name =~ "ARM*#0" && jtag_cable_name =~ "Digilent Zybo 210279539437A"} -index 0 dow /home/greedyhao/LearningAndWorking/first_zynq_design/first_zynq_design.sdk/LED_test/Debug/LED_test.elf configparams force-mem-access 0 ----------------End of Script---------------- 12:11:53 INFO : Context for processor 'ps7_cortexa9_0' is selected. 12:11:53 INFO : 'con' command is executed. 12:11:53 INFO : ----------------XSDB Script (After Launch)---------------- targets -set -nocase -filter {name =~ "ARM*#0" && jtag_cable_name =~ "Digilent Zybo 210279539437A"} -index 0 con ----------------End of Script---------------- 12:11:53 INFO : Disconnected from the channel tcfchan#13. I would very grateful if someone can help me get through this problem.
  16. Guacamoleroger

    Linux on Digilent boards

    Hi, guys, I am in need of a Digilent board to run Linux with a GUI to have access to IOpins and peripherals, and also to work together with the vhdl codes on the FPGA. I am not sure how to install Linux on SD card, start a boot from there, ANDhave at the same time a vhdl code running on FPGA that I could edit and compile using the vivado (2018.2). The idea is to have the vhdl code running the hardware and the GUI on linux to present values of input, output, make the configuration on-line of the vhdl variables, etc... I was thinking about the Zybo board. Can someone give me, please, some directions and/or suggestions? Regards,
  17. AlexSilva

    Zybo Z7 HDMI output with Petalinux

    Hello everyone, I've bought a Zybo Z7 with a XC7Z010. I've downloaded the HDMI demo (link here) and I got it working - I connected my laptop to the RX port and a monitor to the TX port. Now what I'm trying to do is to have the TX connected to a monitor, build an image using Petalinux and once I program the SoC I can see the Linux booting on the monitor. I've built an image using the bit and hdf files provided on the HDMI demo project and on Petalinux kernel config I've enabled the following: Device Drivers -> Graphics support -> Enable HDMI HDCP support in MSM DRM driver -> Xilinx DRM -> Xilinx DRM Display Port Driver -> Xilinx DRM Display Port Subsystem Driver I can program the SoC ok but I get no output on the monitor. Am I missing something? Thanks in advance!
  18. shahbaz

    Can't boot ZYBO from QSPI Flash

    Hi, I'm working on ZYBO SoC. I want to boot it from QSPI flash but it fails anyhow. I have tried two methods using Vivado and IMPACT tool. 1. After successful implementation I created .bit and .bin files for a simple led_blinky project. Than I added "Configuration Memory Device" and selected Spansion s25fl128s 3.3v flash. I loaded the .bin file and then Erased, Verify and Programmed the flash step by step by checking the checkbox. The problem is with verify step. It fails every time. even then if I program it ignoring the failed verify step, it obliviously doesn't boots the program and no led blinks on board after resetting it. PS: I've taken care of the Jumpers already. 2. In the iMPACT tool I first created the PROM for a single FPGA, added 128MiB and created a .mcs file from the .bit file. then I initialized chain and after successful detection of board I added SPI Flash (which is attached above the ARM in the workspace figure) and loaded the flash with .mcs file. than I get option to either Erase, Verify or Program the flash. here too the program fails at Verify Step. Please help out.
  19. yohboy

    Zybo linux and PMOD WIFI

    Hello, I recently received a PMOD wifi (the digilent one). I want to connect it to my zybo, already running linux-yocto with spi interface etc ... So I don't think I need the IP pmod wifi, I can make the connection myself. My question is, is there a getting started to make work the PMOD wifi ? e.g. some code to comminucate with the module. regards, Yohan
  20. melisa

    Zybo Z7 DMA Audio Demo - not working

    Hi, I am trying to implement Audio Demo on Zybo Z7 using this: https://reference.digilentinc.com/learn/programmable-logic/tutorials/zybo-z7-dma-audio-demo/start First, I wanted to do it just using Vivado 2018.2 (without SDK). I followed what is described in this comment: Bitstream is succesfully generated with two following warnings: [Labtools 27-3361] The debug hub core was not detected. Resolution: 1. Make sure the clock connected to the debug hub (dbg_hub) core is a free running clock and is active. 2. Make sure the BSCAN_SWITCH_USER_MASK device property in Vivado Hardware Manager reflects the user scan chain setting in the design and refresh the device. To determine the user scan chain setting in the design, open the implemented design and use 'get_property C_USER_SCAN_CHAIN [get_debug_cores dbg_hub]'. For more details on setting the scan chain property, consult the Vivado Debug and Programming User Guide (UG908). I tried to fix this warnings using Xilinx and Diligent forum, but wasnt successful. Device is programmed but the audio demo is not working (when I press BTN1 and after BTN2 I can not hear anything on headphones). Any suggestions/solutions are very well welcomed. Regards,
  21. Hi I am trying to develop Ethernet transmission with Zybo Z7-10. I tried to add ports like eth_txctl to xdc file, but there is a critical warning I can't understand. You can see pictures in attachments, the ports in my module, the ports I connect pin with, also the project settings. I don't understand why vivado gives my critical warning that the pin is not valid. If I try the ports eth_rxctl and connects it with pin D13, there would't be any warnings. I attached the schematic link as well, where I found the pins and port. I really don't get it, for example, the ports eth_txctl and eth_rxctl are literally on the same block in schematic. According to the schematics, I connect ports and pins, how come there is one work and the other doesn't work? https://reference.digilentinc.com/_media/reference/programmable-logic/zybo-z7/zybo_z7_sch-public.pdf Thanks a lot
  22. K_Ashish

    UART Interrupt in zybo queries

    Hello, I am trying to use UART in interrupt mode using zybo board. I tried Hello World example using UART1 of PS which is 48 49 MIO and it is working. I referred interrupt example in ~\Xilinx\SDK\2016.2\data\embeddedsw\XilinxProcessorIPLib\drivers\uartps_v3_1\examples. But I am not connect uart with Interrupt controller or GIC. Any suggestion on designing hardware in vivado and which reference code to use?
  23. Hello, I want to use the AXI IIC bus Interface found in Vivado to read data from several MLX90393 sensors. My question is about the amount of AXI IIC interfaces needed for this. Is it enough to use only one, or is it necessary to use one for each sensor that will be used? Thanks in advance. MLX90393-Datasheet-Melexis.PDF
  24. I'm trying to develop a video pipeline on the Zybo platform that takes HDMI video in passes it to a custom IP and outputs the new video through VGA. I manage to create a system that takes HDMI and passes the video straight out the VGA interface but when I add in the AXI stream to video IP blocks in I can't seem to get a video out of the VGA. I tried tying all the rst_n and enable on the vid_in_axi4s, axi4s_vid_out and tc off to one but still doesn't output any video on the VGA. I also output the locked signal from the axi4s_vid_out IP to one of the LEDs on the board and it never gets set high. Does anyone have any idea what I might have setup wrong or if I'm missing something?
  25. I am using XADC of Zybo board in DRP mode. I have connected the inputs of the XADC to a potentiometer supplying a voltage in between 0-1 V. I have used the PMOD pins to supply the output to external LEDs. But everytime the board is programmed, the LED outputs show a garbage value which is constant. Changing the potentiometer voltage does not change the outputs. Also resetting the XADC through GPIO buttons has no effect. Please help with the above issue.