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Found 7 results

  1. DirkMasky

    Zybo z7-10 adc + hdmi

    hi all, i want want to measure a voltage with the zybo and display the measured values on a screen via hdmi output. i used the hdmi passthrough projent as a start and got that working fine. know when i added the adc in vivado i get the error that the Vccs on bank 35 are incompatibele because the hdmi used 3.3V and the adc uses 1.8V. but when i look in the schematic under synthesis and look and the i/o ports i see that the hdmi aslo uses 1.8V. so why is it a problem when the adc needs 1.8V but when the hdmi needs 1.8V it works just fine.
  2. Hi everyone, I am currently working with a Zybo Z7010 board on Vivado 2018.3 and am trying to implement a memory access in both reading and writing modes. More precisely, I'd like to enable the user to enter a number of coordinates that define a random waveform (sine table...) and to store it somewhere so that the PL can access it in reading mode and display it through a DAC. Please note that it is essential that the reading process is fast for further applications. Now, have been reading many things but I'm a little confused about the "different types of memories that exist". I'm not sure if I should use the BRAM module, the DDR, SRAM... What are the differences of these components and which one would you suggest to use? Finally, would you have a tutorial that goes through the different steps of the implementation? Thanks a lot, NotMyCupOfTea
  3. Hi I'm newbie for fpga. I want to connect my zybo Z7 device to matlab simulink. I follow these workflow.(https://se.mathworks.com/help/hdlcoder/examples/define-and-register-custom-board-and-reference-design-for-zynq-workflow.html) During 10th step, error message appears. How I can solve this problem? Error using codertarget.zynq.internal.LinuxShell/setupZynqHardware (line 543) Cannot connect to "Zynq hardware". Details: Could not connect to the hardware over Serial Port. Check that USB cable is plugged into 'USB-to-UART' port of the hardware and the power switch is turned on. If this error persists, switch off the hardware, wait for 10 seconds, switch on the hardware and then repeat this step. Error in codertarget.zynq.internal.LinuxShell (line 207) obj.setupZynqHardware(username,password,remotedir); Error in zynq (line 113) h = codertarget.zynq.internal.LinuxShell('ZC702', varargin{:});
  4. I am working on the Zybo Z7-10 board. My goal is to determine the position and orientation of the FPGA in space at any given instance. For that, I am using a PmodACL2 and PmodGYRO. Now, I need to integrate the accelerations and angular velocities. How do I measure the time at which the Pmods are giving me the data?
  5. Hi, I have a Zybo Z7-10 board which has 5 pmod ports on it. However, in the block design, I can see only four of them, v.i.z. JA, JC, JD, and JE. What do I do if I want to use the JF port?
  6. I recently started working on the zybo z7-10 board. I have two pmods - the PmodGPS and the PmodCON3. Both of these pmods have 6 pins each and I want to connect both of these pmods to the same port on the fpga. However, I could not connect the PmodGPIO_0 and the PmodGPS_0 blocks to the same port in my Block Design in Vivado. Is there any way to do this?
  7. I'm working with the HDMI ports on a Zybo Z7-10 development board, and I'm trying to set it up as an HDMI passthrough. As in, the HDMI input signal would simply be fed into the HDMI output port without any processing in between. I will eventually be filtering the video signal but I'm using this passthrough as a starting point. The HDMI hardware on my Zybo, as well as my HDMI source and output screen, are all confirmed working because I've been able to run Digilent's HDMI demo on it. I'm using Vivado 2017.3 I was able to get my block design started by following this forum post, replacing the VGA output with an HDMI output. I can currently feed my input video signal to my HDMI output. However, my output video quality looks horrible. I'm currently using a laptop as my HDMI source, and a custom built screen as my video output. This album shows pictures of my video output. The output of the color gradient contains a lot of vertical lines, and the color transitions are not smooth. The color bar also contains the same vertical lines, although not as visible. For the most part the colors on the output screen match the colors of the original image. I've also tried displaying a vertical color gradient, and same vertical lines appear, as well as a bunch of horizontal lines. Attached is a picture of my current block diagram. The DDC pins are connected to scl and sdi of the hdmi rx port. The output of the clocking wizard is 200MHz. GND and VDD are constant blocks of value 0 and 1 respectively. The system clock is configured as follows: set_property -dict { PACKAGE_PIN K17 IOSTANDARD LVCMOS33 } [get_ports { clk }]; #IO_L12P_T1_MRCC_35 Sch=sysclk create_clock -add -name sys_clk_pin -period 8.00 -waveform {0 4} [get_ports { clk }]; I suspect it might be a clocking issue, but I'm not sure which clock signal to alter, and what frequency to set it to. Let me know if I can provide any additional information.